Datasheet

AUGUST 2009
AS6C4008
512K X 8 BIT LOW POWER CMOS SRAM
CAPACITANCE (TA = 25℃, f = 1.0MHz)
PARAMETER
SYMBOL
MIN.
MAX
UNIT
Input Capacitance
C
IN
-
6
pF
Input/Output Capacitance
C
I/O
-
8
pF
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Input Pulse Levels
0.2V to V
CC
- 0.2V
Input Rise and Fall Times
3ns
Input and Output Timing Reference Levels
1.5V
Output Load
C
L
= 30pF + 1TTL, I
OH
/I
OL
= -2mA/4mA
AC ELECTRICAL CHARACTERISTICS
(1) READ CYCLE
PARAMETER
SYM.
AS6C4008-55
UNIT
MIN.
MAX.
Read Cycle Time
t
RC
55
-
ns
Address Access Time
t
AA
-
55
ns
Chip Enable Access Time
t
ACE
-
55
ns
Output Enable Access Time
t
OE
-
30
ns
Chip Enable to Output in Low-Z
t
CLZ
*
10
-
ns
Output Enable to Output in Low-Z
t
OLZ
*
5
-
ns
Chip Disable to Output in High-Z
t
CHZ
*
-
20
ns
Output Disable to Output in High-Z
t
OHZ
*
-
20
ns
Output Hold from Address Change
t
OH
10
-
ns
(2) WRITE CYCLE
PARAMETER SYM.
AS6C4008-55
UNIT
MIN.
MAX.
Write Cycle Time
t
WC
55
-
ns
Address Valid to End of Write
t
AW
50
-
ns
Chip Enable to End of Write
t
CW
50
-
ns
Address Set-up Time
t
AS
0
-
ns
Write Pulse Width
t
WP
45
-
ns
Write Recovery Time
t
WR
0
-
ns
Data to Write Time Overlap
t
DW
25
-
ns
Data Hold from End of Write Time
t
DH
0
ns
Output Active from End of Write
t
OW
*
5
-
ns
Write to Output in High-Z
t
WHZ
*
-
20
ns
*These parameters are guaranteed by device characterization, but not production tested.
AUG09 v1.4 Alliance Memory Inc Page 4 of 14