Datasheet

Notes:
1. V
IH
(max) = V
CC
+ 3.0V for pulse width less than 10ns.
2. V
IL
(min) = V
SS
- 3.0V for pulse width less than 10ns.
3. Over/Undershoot specifications are characterized, not 100% tested.
4. Typical values are included for reference only and are not guaranteed or tested.
Typical valued are measured at V
CC
= V
CC
(TYP.) and T
A
= 25
ºC
CAPACITANCE (TA = 25 , f℃ = 1.0MHz)
PARAMETER SYMBOL MIN. MAX UNIT
CecnaticapaCtupnI
IN
-
6 pF
Input/Output Capacitance C
I/O
-
8 pF
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
VotV2.0sleveLesluPtupnI
CC
- 0.2V
sn3semiTllaFdnaesiRtupnI
Input and Output Timing Reference Levels 1.5V
CdaoLtuptuO
L
=30pF + 1TTL, I
OH
/I
OL
= -1mA/2mA
AC ELECTRICAL CHARACTERISTICS
(1) READ CYCLE
AS6C1008-55
PARAMETER SYM.
MIN. MAX.
UNIT
Read Cycle Time t
RC
55 - ns
Address Access Time t
AA
- 55 ns
Chip Enable Access Time t
ACE
- 55 ns
Output Enable Access Time t
OE
- 30 ns
Chip Enable to Output in Low-Z t
CLZ
* 10 - ns
Output Enable to Output in Low-Z t
OLZ
* 5 - ns
Chip Disable to Output in High-Z t
CHZ
* - 20 ns
Output Disable to Output in High-Z t
OHZ
* - 20 ns
Output Hold from Address Change t
OH
10 - ns
(2) WRITE CYCLE
PARAMETER SYM.
MIN. MAX.
UNIT
Write Cycle Time t
WC
55 - ns
Address Valid to End of Write t
AW
50 - ns
Chip Enable to End of Write t
CW
50 - ns
Address Set-up Time t
AS
0 - ns
Write Pulse Width t
WP
45 - ns
Write Recovery Time t
WR
0 - ns
Data to Write Time Overlap t
DW
25 - ns
Data Hold from End of Write Time t
DH
0 - ns
Output Active from End of Write t
OW
* 5 - ns
Write to Output in High-Z t
WHZ
* - 20 ns
*These parameters are guaranteed by device characterization, but not production tested.
AS6C1008-55
®
February 2007
128K X 8 BIT LOW POWER CMOS SRAM
AS6C1008
02/February/07, v 1.0
Alliance Memory Inc.
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