Datasheet

Figure 50. CKE intensive environment
CK#
CKE
t
CKE
NOTE: The pattern shown above can repeat over a long period of time. With this pattern, DRAM guarantees all AC and DC timing & voltage
specifications and DLL operation with temperature and voltage drift
CK
t
CKE
t
CKE
t
CKE
t
XP
t
XP
t
REFI
REF REF
CMD
Figure 51. Read to power-down entry
CK#
CMD
BL=4
T0 T2 Tx Tx+1 Tx+2 Tx+3 Tx+4 Tx+5 Tx+6 Tx+7T1 Tx+8 Tx+9
RD
Q
AL+CL
Read operation starts with a read command and
DQS
CKE
CK
DQS#
CKE should be kept HIGH until the end of burst operation
t
IS
Q Q Q
DQ
CK#
CMD
BL=8
T0 T2 Tx Tx+1 Tx+2 Tx+3 Tx+4 Tx+5 Tx+6 Tx+7T1 Tx+8 Tx+9
RD
Q
AL+CL
DQS
CKE
CK
DQS#
CKE should be kept HIGH until the end of burst operation
t
IS
Q Q Q
DQ
Q Q Q Q
AS4C64M16D2A-25BIN
AS4C64M16D2A-25BCN
Confidential
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Rev.1.1 October 2017