Datasheet

Table 30. Input clock jitter spec parameter
Parameter
Symbol
Note
Max.
Clock period jitter
t
JIT (
per)
-100
100
ps
33
Clock period jitter during DLL locking
period
t
JIT
(per,lck)
-80
80
ps
33
Cycle to cycle clock period jitter
t
JIT
(cc)
-200
200
ps
33
Cycle to cycle clock period jitter during DLL
locking period
t
JIT
(cc,lck)
-160
160
ps
33
Cumulative error across 2 cycles
t
ERR
(2per)
-150
150
ps
33
Cumulative error across 3 cycles
t
ERR
(3per)
-175
175
ps
33
Cumulative error across 4 cycles
t
ERR
(4per)
-200
200
ps
33
Cumulative error across 5 cycles
t
ERR
(5per)
-200
200
ps
33
Cumulative error across n cycles, n=6...10,
inclusive
t
ERR
(6-10per)
-300
300
ps
33
Cumulative error across n cycles,
n=11...50, inclusive
t
ERR
(11-50per)
-450
450
ps
33
Duty cycle jitter
t
JIT
(duty)
-100
100
ps
33
NOTE 34: These parameters are specified per their average values, however it is understood that the following
relationship between the average timing and the absolute instantaneous timing holds at all times. (Min
andmax of SPEC values are to be used for calculations in the table below.)
Table 31. Absolute clock period average values
Parameter
Symbol
Min.
Max.
Unit
Absolute clock period
t
CK
(abs)
t
CK
(avg),min + t
JIT
(per),min
t
CK
(avg),max + t
JIT
(per),max
ps
Absolute clock HIGH pulse width
t
CH
(abs)
t
CH
(avg),min * t
CK
(avg),min +
t
JIT
(duty),min
t
CH
(avg),max * t
CK
(avg),max +
t
JIT
(duty),max
ps
Absolute clock LOW pulse width
t
CL
(abs)
t
CL
(avg),min * t
CK
(avg),min +
t
JIT
(duty),min
t
CL
(avg), max * t
CK
(avg),max +
t
JIT
(duty), max
ps
NOTE 35: t
HP
is the minimum of the absolute half period of the actual input clock. t
HP
is an input parameter but not
an input specification parameter. It is used in conjunction with t
QHS
to derive the DRAM output timing t
QH
.
The value to be used for tQH calculation is determined by the following equation;
t
HP
= Min ( t
CH
(abs), t
CL
(abs) ),
where,
t
CH
(abs) is the minimum of the actual instantaneous clock HIGH time;
t
CL
(abs) is the minimum of the actual instantaneous clock LOW time;
NOTE 36: t
QHS
accounts for:
1) The pulse duration distortion of on-chip clock circuits, which represents how well the actual t
HP
at the
input is transferred to the output; and
2) The worst case push-out of DQS on one transition followed by the worst case pull-in of DQ on the next
transition, both of which are independent of each other, due to data pin skew, output pattern effects,
and p-channel to n-channel variation of the output drivers
NOTE 37: t
QH
= t
HP
– t
QHS
, where: t
HP
is the minimum of the absolute half period of the actual input clock; and t
QHS
is
the specification value under the max column. {The less half-pulse width distortion present, the larger the
t
QH
value is; and the larger the valid data eye will be.}
-25
Min.
Unit
AS4C64M16D2A-25BIN
AS4C64M16D2A-25BCN
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Rev.1.1 October 2017