Datasheet

On-Die Termination
ODT (On-Die Termination) is a feature of the DDR4 SDRAM that allows the DRAM to change termination
resistance for each DQ,DQS, DQS# and DM# for x8 configuration (and TDQS, TDQS# for x8 configuration,
when enabled via A11=1 in MR1) via the ODT control pin or Write Command or Default Parking value with MR
setting. The ODT feature is designed to improve signal integrity of the memory channel by allowing the DRAM
controller to independently change termination resistance for any or all DRAM devices.
The ODT feature is turned off and not supported in Self-Refresh mode. A simple functional representation of
the DRAM ODT feature is shown below.
To other circuitry
like
DQ, DQS, DM,
ODT
VDDQ
RTT
Switch
Figure 162. Functional Representation of ODT
The switch is enabled by the internal ODT control logic, which uses the external ODT pin and Mode Register
Setting and other control information, see below. The value of R
TT
is determined by the settings of mode
register bits (see Mode Register). The ODT pin will be ignored if the mode register MR1 is programmed to
disable R
TT_NOM
(MR1 A [10:8] = 000) and in self refresh mode.
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AS4C512M8D4
Confidential
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Rev.1.0. Aug.2019