Datasheet

512M x 8 bit DDR4 Synchronous DRAM (SDRAM)
Preliminary (Rev. 1.0, Aug. /2019)
Features

JEDEC Standard Compliant

Fast clock rate: 1200/1333MHz

Power supplies:
- V
DD
& V
DDQ
= +1.2V ± 0.06V
- V
PP
= +2.5V -0.125V / +0.25V
 Operating temperature:

Supports JEDEC clock jitter specification

Bidirectional differential data strobe, DQS &DQS#

Differential Clock, CK & CK#

16 internal banks: 4 groups of 4 banks each

Separated IO gating structures by Bank Group

8n-bit prefetch architecture

Precharge & Active power down

Auto Refresh and Self Refresh

Low-power auto self refresh (LPASR)

Self Refresh Abort

Fine Granularity Refresh

Dynamic ODT (R
TT_PARK
& R
TT_Nom
& R
TT_WR
)

Write Leveling

DQ Training via MPR

Programmable preamble is supported both of 1t
CK
and 2t
CK
mode

Command/Address (CA) Parity

Data bus write cyclic redundancy check (CRC)

Internal V
REFDQ
Training

Read Preamble Training

Control Gear Down Mode

Per DRAM Addressability (PDA)

Output Driver Impedance Control

Dynamic on-die termination (ODT)

Input Data Mask (DM) and Data Bus Inversion (DBI)

ZQ Calibration

Command/Address latency (CAL)

Maximum Power Saving Mode (MPSM)

Asynchronous Reset

DLL enable/disable

Burst Length (BL8/BC4/BC4 or 8 on the fly)

Burst type: Sequential / Interleave

CAS Latency (CL)

CAS Write Latency (CWL)

Additive Latency (AL): 0, CL-1, CL-2

Average refresh period
- 8192 cycles/64ms (7.8us at -40°C
≤
T
C
≤
+85°C)
- 8192 cycles/32ms (3.9us at +85°C
≤
T
C
≤
+95°C)

Data Interface: Pseudo Open Drain (POD)

RoHS compliant

Hard post package repair (hPPR)

Soft post package repair (sPPR)

Package: Pb Free and Halogen Free
- 78-ball 7.5 x 10.6 x 1.2mm FBGA
- Commercial : T
C
= 0~95
°
C
- Industrial: T
C
= -40~95
°
C
Table 1. Or
dering Information
Table 2. Speed Grade Information
Product part No
Org Temperature
Max Clock (MHz)
1200
Package
78-ball FBGA
Commercial (Extended)
0°C to 95°C
1200
Industrial -40°C to 95°C
78-ball FBGA
512M x 8
AS4C512M8D4-83BCN
AS4C512M8D4-83BIN
512M x 8
CAS Latency
tRCD(ns)
14.16
tRP(ns)
14.16
17
14.25
14.25
Speed Grade
Clock Frequency
DDR4-2400
1200 MHz
DDR4-2666
1333 MHz
19
1333
78-ball FBGA
Commercial (Extended)
0°C to 95°C
1333
Industrial -40°C to 95°C
78-ball FBGA
512M x 8
AS4C512M8D4-75BCN
AS4C512M8D4-75BIN
512M x 8
AS4C512M8D4
Confidential
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Rev.1.0. Aug.2019