Datasheet

Table 73. Capacitance
Symbol
Parameter
DDR4-2400/2666
Unit
Note
Min.
Max.
C
IO
Input/output capacitance
0.55
1.15
pF
1,2,3
C
DIO
Input/output capacitance delta
-0.1
0.1
pF
1,2,3,11
C
DDQS
Input/output capacitance delta DQS and DQS#
-
0.05
pF
1,2,3,5
C
CK
Input capacitance, CK and CK#
0.2
0.7
pF
1,3
C
DCK
Input capacitance delta CK and CK#
-
0.05
pF
1,3,4
C
I
Input capacitance(CTRL, ADD, CMD pins only)
0.2
0.7
pF
1,3,6
C
DI_CTRL
Input capacitance delta (All CTRL pins only)
-0.1
0.1
pF
1,3,7,8
C
DI_ADD_CMD
Input capacitance delta (All ADD/CMD pins only)
-0.1
0.1
pF
1,2,9,10
C
ALERT
Input/output capacitance of ALERT
0.5
1.5
pF
1,3
C
ZQ
Input/output capacitance of ZQ
-
2.3
pF
1,3,12
Note 1. This parameter is not subject to production test. It is verified by design and characterization. The silicon only capacitance is
validated by deem bedding the package L and C parasitic. The capacitance is measured with V
DD
, V
DDQ
, V
SS
, V
SSQ
applied with all
other signal pins floating. Measurement procedure TBD. Used to define a differential signal slew-rate.
Note 2. DQ, DM#, DQS, DQS#. Although the DM pins have different functions, the loading matches DQ and DQS.
Note 3. This parameter applies to monolithic devices only; stacked/dual-die devices are not covered here.
Note 4. Absolute value CK-CK#.
Note 5. Absolute value of C
IO
(DQS) - C
IO
(DQS#).
Note 6. C
I
applies to ODT, CS#, CKE, A0-A16, BA0-BA1, BG0-BG1, RAS#/A16, CAS#/A15, WE#/A14, ACT# and PAR.
Note 7. C
DI_CTRL
applies to ODT, CS# and CKE.
Note 8. C
DI_CTRL
= C
I
(CTRL) - 0.5 x ( C
I
(CLK) + C
I
(CLK#)).
Note 9. C
DI_ADD_CMD
applies to, A0-A16, BA0-BA1, BG0, RAS#/A16, CAS#/A15, WE#/A14, ACT# and PAR.
Note 10. C
DI_ADD_CMD
= C
I
(ADD_CMD) - 0.5 x ( C
I
(CLK) + C
I
(CLK#)).
Note 11. C
DIO
= C
IO
(DQ,DM) - 0.5 x (C
IO
(DQS) + C
IO
(DQS#)).
Note 12. Maximum external load capacitance on ZQ pin: TBD pF.
!
AS4C512M8D4
Confidential
- 160 of 196 -
Rev.1.0. Aug.2019