Datasheet
Table Of Contents
- DDR3L SDRAM
- Description
- State Diagram
- Functional Description
- Functional Block Diagrams
- Ball Assignments and Descriptions
- Package Dimensions
- Electrical Specifications
- Thermal Characteristics
- Electrical Specifications – I DD Specifications and Conditions
- Electrical Characteristics – 1.35V IDD Specifications
- Electrical Specifications – DC and AC
- ODT Characteristics
- Output Driver Impedance
- Output Characteristics and Operating Conditions
- Speed Bin Tables
- Electrical Characteristics and AC Operating Conditions
- Electrical Characteristics and AC Operating Conditions
- Command and Address Setup, Hold, and Derating
- Data Setup, Hold, and Derating
- Commands – Truth Tables
- Commands
- Input Clock Frequency Change
- Write Leveling
- Initialization
- Voltage Initialization / Change
- Mode Registers
- Mode Register 0 (MR0)
- Mode Register 1 (MR1)
- Mode Register 2 (MR2)
- Mode Register 3 (MR3)
- MODE REGISTER SET (MRS) Command
- ZQ CALIBRATION Operation
- ACTIVATE Operation
- READ Operation
- WRITE Operation
- PRECHARGE Operation
- SELF REFRESH Operation
- Extended Temperature Usage
- Power-Down Mode
- RESET Operation
- On-Die Termination (ODT)
- Dynamic ODT
- Synchronous ODT Mode
- Asynchronous ODT Mode
- Asynchronous to Synchronous ODT Mode Transition (Power-Down Exit)
Table 55: Electrical Characteristics and AC Operating Conditions (Continued)
Notes 1–8 apply to the entire table
Parameter Symbol
DDR3L-800 DDR3L-1066 DDR3L-1333 DDR3L-1600
Unit NotesMin Max Min Max Min Max Min Max
WRITE with auto
precharge command to
power-down entry
BL8 (OTF, MRS)
BC4OTF
t
WRAP-
DEN
MIN = WL + 4 + WR + 1 CK
BC4MRS
t
WRAP-
DEN
MIN = WL + 2 + WR + 1 CK
Power-Down Exit Timing
DLL on, any valid command, or DLL off to
commands not requiring locked DLL
t
XP MIN = greater of 3CK or 7.5ns;
MAX = N/A
MIN = greater of 3CK or 6ns;
MAX = N/A
CK
Precharge power-down with DLL off to
commands requiring a locked DLL
t
XPDLL MIN = greater of 10CK or 24ns; MAX = N/A CK 28
ODT Timing
R
TT
synchronous turn-on delay ODTLon CWL + AL - 2CK CK 38
R
TT
synchronous turn-off delay ODTLoff CWL + AL - 2CK CK 40
R
TT
turn-on from ODTL on reference
t
AON –400 400 –300 300 –250 250 –225 225 ps 23, 38
R
TT
turn-off from ODTL off reference
t
AOF 0.3 0.7 0.3 0.7 0.3 0.7 0.3 0.7 CK 39, 40
Asynchronous R
TT
turn-on delay
(power-down with DLL off)
t
AONPD MIN = 2; MAX = 8.5 ns 38
Asynchronous R
TT
turn-off delay
(power-down with DLL off)
t
AOFPD MIN = 2; MAX = 8.5 ns 40
ODT HIGH time with WRITE command and
BL8
ODTH8 MIN = 6; MAX = N/A CK
ODT HIGH time without WRITE command or
with WRITE command and BC4
ODTH4 MIN = 4; MAX = N/A CK
Dynamic ODT Timing
R
TT,nom
-to-R
TT(WR)
change skew ODTLcnw WL - 2CK CK
R
TT(WR)
-to-R
TT,nom
change skew - BC4 ODTLcwn4 4CK + ODTLoff CK
R
TT(WR)
-to-R
TT,nom
change skew - BL8 ODTLcwn8 6CK + ODTLoff CK
R
TT
dynamic change skew
t
ADC 0.3 0.7 0.3 0.7 0.3 0.7 0.3 0.7 CK 39
Write Leveling Timing
First DQS, DQS# rising edge
t
WLMRD 40 – 40 – 40 – 40 – CK
DQS, DQS# delay
t
WLDQSEN 25 – 25 – 25 – 25 – CK
Write leveling setup from rising CK, CK#
crossing to rising DQS, DQS# crossing
t
WLS 325 – 245 – 195 – 165 – ps
8Gb: x4, x8, x16 DDR3L SDRAM
Electrical Characteristics and AC Operating Conditions
78
Rev 2.0 June 2016
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