Datasheet
Table Of Contents
- DDR3L SDRAM
- Description
- State Diagram
- Functional Description
- Functional Block Diagrams
- Ball Assignments and Descriptions
- Package Dimensions
- Electrical Specifications
- Thermal Characteristics
- Electrical Specifications – I DD Specifications and Conditions
- Electrical Characteristics – 1.35V IDD Specifications
- Electrical Specifications – DC and AC
- ODT Characteristics
- Output Driver Impedance
- Output Characteristics and Operating Conditions
- Speed Bin Tables
- Electrical Characteristics and AC Operating Conditions
- Electrical Characteristics and AC Operating Conditions
- Command and Address Setup, Hold, and Derating
- Data Setup, Hold, and Derating
- Commands – Truth Tables
- Commands
- Input Clock Frequency Change
- Write Leveling
- Initialization
- Voltage Initialization / Change
- Mode Registers
- Mode Register 0 (MR0)
- Mode Register 1 (MR1)
- Mode Register 2 (MR2)
- Mode Register 3 (MR3)
- MODE REGISTER SET (MRS) Command
- ZQ CALIBRATION Operation
- ACTIVATE Operation
- READ Operation
- WRITE Operation
- PRECHARGE Operation
- SELF REFRESH Operation
- Extended Temperature Usage
- Power-Down Mode
- RESET Operation
- On-Die Termination (ODT)
- Dynamic ODT
- Synchronous ODT Mode
- Asynchronous ODT Mode
- Asynchronous to Synchronous ODT Mode Transition (Power-Down Exit)

Table 55: Electrical Characteristics and AC Operating Conditions (Continued)
Notes 1–8 apply to the entire table
Parameter Symbol
DDR3L-800 DDR3L-1066 DDR3L-1333 DDR3L-1600
Unit NotesMin Max Min Max Min Max Min Max
Auto precharge write recovery + precharge
time
t
DAL MIN = WR +
t
RP/
t
CK (AVG); MAX = N/A CK
MODE REGISTER SET command cycle time
t
MRD MIN = 4CK; MAX = N/A CK
MODE REGISTER SET command update delay
t
MOD MIN = greater of 12CK or 15ns; MAX = N/A CK
MULTIPURPOSE REGISTER READ burst end to
mode register set for multipurpose register
exit
t
MPRR MIN = 1CK; MAX = N/A CK
Calibration Timing
ZQCL command: Long
calibration time
POWER-UP and RE-
SET operation
t
ZQinit 512 – 512 – 512 – 512 – CK
Normal operation
t
ZQoper 256 – 256 – 256 – 256 – CK
ZQCS command: Short calibration time
t
ZQCS 64 – 64 – 64 – 64 – CK
Initialization and Reset Timing
Exit reset from CKE HIGH to a valid command
t
XPR MIN = greater of 5CK or
t
RFC + 10ns; MAX = N/A CK
Begin power supply ramp to power supplies
stable
t
VDDPR MIN = N/A; MAX = 200 ms
RESET# LOW to power supplies stable
t
RPS MIN = 0; MAX = 200 ms
RESET# LOW to I/O and R
TT
High-Z
t
IOZ MIN = N/A; MAX = 20 ns 35
Refresh Timing
REFRESH-to-ACTIVATE or REFRESH
command period
t
RFC – 1Gb MIN = 110; MAX = 70,200 ns
t
RFC – 2Gb MIN = 160; MAX = 70,200 ns
t
RFC – 4Gb MIN = 260; MAX = 70,200 ns
t
RFC – 8Gb MIN = 350; MAX = 70,200 ns
Maximum refresh
period
T
C
≤ 85°C – 64 (1X) ms 36
T
C
> 85°C 32 (2X) ms 36
Maximum average
periodic refresh
T
C
≤ 85°C
t
REFI 7.8 (64ms/8192) μs 36
T
C
> 85°C 3.9 (32ms/8192) μs 36
Self Refresh Timing
Exit self refresh to commands not requiring a
locked DLL
t
XS MIN = greater of 5CK or
t
RFC + 10ns; MAX = N/A CK
8Gb: x4, x8, x16 DDR3L SDRAM
Electrical Characteristics and AC Operating Conditions
76
Rev 2.0 June 2016
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