Datasheet

Speed Bin Tables
Table 50: DDR3L-1066 Speed Bins
DDR3L-1066 Speed Bin
-18E -18
Unit Notes
CL-
t
RCD-
t
RP 7-7-7 8-8-8
Parameter Symbol Min Max Min Max
Internal READ command to first data
t
AA 13.125 – 15 – ns
ACTIVATE to internal READ or WRITE delay
time
t
RCD 13.125 – 15 – ns
PRECHARGE command period
t
RP 13.125 – 15 – ns
ACTIVATE-to-ACTIVATE or REFRESH command
period
t
RC 50.625 – 52.5 – ns
ACTIVATE-to-PRECHARGE command period
t
RAS 37.5 9 x
t
REFI 37.5 9 x
t
REFI ns 1
CL = 5 CWL = 5
t
CK (AVG) 3.0 3.3 3.0 3.3 ns 2
CWL = 6
t
CK (AVG) Reserved Reserved ns 3
CL = 6 CWL = 5
t
CK (AVG) 2.5 3.3 2.5 3.3 ns 2
CWL = 6
t
CK (AVG) Reserved Reserved ns 3
CL = 7 CWL = 5
t
CK (AVG) Reserved Reserved ns 3
CWL = 6
t
CK (AVG) 1.875 <2.5 Reserved ns 2, 3
CL = 8 CWL = 5
t
CK (AVG) Reserved Reserved ns 3
CWL = 6
t
CK (AVG) 1.875 <2.5 1.875 <2.5 ns 2
Supported CL settings 5, 6, 7, 8 5, 6, 8 CK
Supported CWL settings 5, 6 5, 6 CK
Notes:
1.
t
REFI depends on T
OPER
.
2. The CL and CWL settings result in
t
CK requirements. When making a selection of
t
CK,
both CL and CWL requirement settings need to be fulfilled.
3. Reserved settings are not allowed.
8Gb: x4, x8, x16 DDR3L SDRAM
Speed Bin Tables
68
Rev 2.0 June 2016
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