Datasheet
Table Of Contents
- DDR3L SDRAM
- Description
- State Diagram
- Functional Description
- Functional Block Diagrams
- Ball Assignments and Descriptions
- Package Dimensions
- Electrical Specifications
- Thermal Characteristics
- Electrical Specifications – I DD Specifications and Conditions
- Electrical Characteristics – 1.35V IDD Specifications
- Electrical Specifications – DC and AC
- ODT Characteristics
- Output Driver Impedance
- Output Characteristics and Operating Conditions
- Speed Bin Tables
- Electrical Characteristics and AC Operating Conditions
- Electrical Characteristics and AC Operating Conditions
- Command and Address Setup, Hold, and Derating
- Data Setup, Hold, and Derating
- Commands – Truth Tables
- Commands
- Input Clock Frequency Change
- Write Leveling
- Initialization
- Voltage Initialization / Change
- Mode Registers
- Mode Register 0 (MR0)
- Mode Register 1 (MR1)
- Mode Register 2 (MR2)
- Mode Register 3 (MR3)
- MODE REGISTER SET (MRS) Command
- ZQ CALIBRATION Operation
- ACTIVATE Operation
- READ Operation
- WRITE Operation
- PRECHARGE Operation
- SELF REFRESH Operation
- Extended Temperature Usage
- Power-Down Mode
- RESET Operation
- On-Die Termination (ODT)
- Dynamic ODT
- Synchronous ODT Mode
- Asynchronous ODT Mode
- Asynchronous to Synchronous ODT Mode Transition (Power-Down Exit)

34 Ohm Output Driver Impedance
The 34Ω driver (MR1[5, 1] = 01) is the default driver. Unless otherwise stated, all timings
and specifications listed herein apply to the 34Ω driver only. Its impedance R
ON
is de-
fined by the value of the external reference resistor RZQ as follows: R
ON34
= RZQ/7 (with
nominal RZQ = 240Ω ±1%) and is actually 34.3Ω
Table 35: DDR3L 34 Ohm Driver Impedance Characteristics
MR1
[5, 1]
R
ON
Resistor V
OUT
Min Nom Max Units
0, 1 Ω R
ON,34PD
0.2 × V
DDQ
0.6 1.0 1.15 RZQ/7
0.5 × V
DDQ
0.9 1.0 1.15 RZQ/7
0.8 × V
DDQ
0.9 1.0 1.45 RZQ/7
R
ON,34PU
0.2 × V
DDQ
0.9 1.0 1.45 RZQ/7
0.5 × V
DDQ
0.9 1.0 1.15 RZQ/7
0.8 × V
DDQ
0.6 1.0 1.15 RZQ/7
Pull-up/pull-down mismatch (MM
PUPD
)V
IL(AC)
to V
IH(AC)
–10 N/A 10 %
Notes:
1. Tolerance limits assume RZQ of 240Ω ±1% and are applicable after proper ZQ calibra-
tion has been performed at a stable temperature and voltage: V
DDQ
= V
DD
; V
SSQ
= V
SS
).
Refer to DDR3L 34 Ohm Output Driver Sensitivity (page 59) if either the temperature
or the voltage changes after calibration.
2. Measurement definition for mismatch between pull-up and pull-down (MM
PUPD
). Meas-
ure both R
ON(PU)
and R
ON(PD)
at 0.5 × V
DDQ
:
MM
PUPD
= × 100
R
ON(PU)
- R
ON(PD)
R
ON,nom
3. For IT and AT (1Gb only) devices, the minimum values are derated by 6% when the de-
vice operates between –40°C and 0°C (T
C
).
A larger maximum limit will result in slightly lower minimum currents.
8Gb: x4, x8, x16 DDR3L SDRAM
Output Driver Impedance
57
Rev 2.0 June 2016
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