Datasheet

Table 30: 1.35V R
TT
Effective Impedance (Continued)
MR1
[9, 6, 2]
R
TT
Resistor V
OUT
Min Nom Max Units
1, 0, 0 Ω R
TT,20PD40
0.2 × V
DDQ
0.6 1.0 1.15 RZQ/6
0.5 × V
DDQ
0.9 1.0 1.15 RZQ/6
0.8 × V
DDQ
0.9 1.0 1.45 RZQ/6
R
TT,20PU40
0.2 × V
DDQ
0.9 1.0 1.45 RZQ/6
0.5 × V
DDQ
0.9 1.0 1.15 RZQ/6
0.8 × V
DDQ
0.6 1.0 1.15 RZQ/6
Ω V
IL(AC)
to V
IH(AC)
0.9 1.0 1.65 RZQ/12
ODT Sensitivity
If either the temperature or voltage changes after I/O calibration, then the tolerance
limits listed in Table 29 and Table 30 can be expected to widen according to Table 31
and Table 32.
Table 31: ODT Sensitivity Definition
Symbol Min Max Unit
R
TT
0.9 - dR
TT
dT × |DT| - dR
TT
dV × |DV| 1.6 + dR
TT
dT × |DT| + dR
TT
dV × |DV| RZQ/(2, 4, 6, 8, 12)
Note:
1. ΔT = T - T(@ calibration), ΔV = V
DDQ
- V
DDQ
(@ calibration) and V
DD
= V
DDQ
.
Table 32: ODT Temperature and Voltage Sensitivity
Change Min Max Unit
dR
TT
dT 0 1.5 %/°C
dR
TT
dV 0 0.15 %/mV
Note:
1. ΔT = T - T(@ calibration), ΔV = V
DDQ
- V
DDQ
(@ calibration) and V
DD
= V
DDQ
.
ODT Timing Definitions
ODT loading differs from that used in AC timing measurements. The reference load for
ODT timings is shown in Figure 20. Two parameters define when ODT turns on or off
synchronously, two define when ODT turns on or off asynchronously, and another de-
fines when ODT turns on or off dynamically. Table 33 and Table 34 (page 53) outline
and provide definition and measurement references settings for each parameter.
ODT turn-on time begins when the output leaves High-Z and ODT resistance begins to
turn on. ODT turn-off time begins when the output leaves Low-Z and ODT resistance
begins to turn off.
8Gb: x4, x8, x16 DDR3L SDRAM
ODT Characteristics
52
Rev 2.0 June 2016
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