Datasheet

Figure 11: DDR3L 1.35V Input Signal
0.0V
V
REF
- 90mV
V
REF
= V
DD
/2
V
DD
.51 x
V
IL(AC)
V
IL(DC)
V
REFDQ
- AC noise
V
REFDQ
- DC error
V
REFDQ
+ DC error
V
REFDQ
+ AC noise
V
IH(DC)
V
IH(AC)
V
DD
V
DD
+ 0.4V
Narrow pulse width
V
SS
- 0.40V
Narrow pulse width
V
DDQ
V
DDQ
+ 0.4V
Overshoot
V
SS
- 0.40V
Undershoot
V
SS
V
IL
MIN(AC)
V
IL
MIN(DC)
MAX 2% Total
DC MIN
V
REF
V
REF
DC MAX
MAX 2% Total
V
IH
MIN(DC)
V
IH
MIN(AC)
Minimum V
IL
and V
IH
levels
V
IH(DC)
V
IH(AC)
V
IL(AC)
V
IL(DC)
V
IL
and V
IH
levels with ringback
V
REF
DC MAX + 1%
V
REF
DC MIN - 1% V
DD
V
REF
+ 90mV
V
REF
+ 125/135/160mV
V
REF
- 125/135/160mV
V
DD
.49 x
Note:
1. Numbers in diagrams reflect nominal values.
8Gb: x4, x8, x16 DDR3L SDRAM
Electrical Specifications – DC and AC
43
Rev.2.0 June 2016
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