Datasheet

Table 22: DDR3L 1.35V Input Switching Conditions – Command and Address
Parameter/Condition Symbol DDR3L-800/1066 DDR3L-1333/1600 DDR3L-1866/2133 Units
Command and Address
Input high AC voltage: Logic 1 V
IH(AC160),min
5
160 160 – mV
V
IH(AC135),min
5
135 135 135 mV
V
IH(AC125),min
5
– – 125 mV
Input high DC voltage: Logic 1 V
IH(DC90),min
90 90 90 mV
Input low DC voltage: Logic 0 V
IL(DC90),min
–90 –90 –90 mV
Input low AC voltage: Logic 0 V
IL(AC125),min
5
– – –125 mV
V
IL(AC135),min
5
–135 –135 –135 mV
V
IL(AC160),min
5
–160 –160 – mV
DQ and DM
Input high AC voltage: Logic 1 V
IH(AC160),min
5
160 160 – mV
V
IH(AC135),min
5
135 135 135 mV
V
IH(AC125),min
5
– – 130 mV
Input high DC voltage: Logic 1 V
IH(DC90),min
90 90 90 mV
Input low DC voltage: Logic 0 V
IL(DC90),min
–90 –90 –90 mV
Input low AC voltage: Logic 0 V
IL(AC125),min
5
– – –130 mV
V
IL(AC135),min
5
–135 –135 –135 mV
V
IL(AC160),min
5
–160 –160 – mV
Notes:
1. All voltages are referenced to V
REF
. V
REF
is V
REFCA
for control, command, and address. All
slew rates and setup/hold times are specified at the DRAM ball. V
REF
is V
REFDQ
for DQ
and DM inputs.
2. Input setup timing parameters (
t
IS and
t
DS) are referenced at V
IL(AC)
/V
IH(AC)
, not V
REF(DC)
.
3. Input hold timing parameters (
t
IH and
t
DH) are referenced at V
IL(DC)
/V
IH(DC)
, not V
REF(DC)
.
4. Single-ended input slew rate = 1 V/ns; maximum input voltage swing under test is
900mV (peak-to-peak).
5. When two V
IH(AC)
values (and two corresponding V
IL(AC)
values) are listed for a specific
speed bin, the user may choose either value for the input AC level. Whichever value is
used, the associated setup time for that AC level must also be used. Additionally, one
V
IH(AC)
value may be used for address/command inputs and the other V
IH(AC)
value may
be used for data inputs.
For example, for DDR3-800, two input AC levels are defined: V
IH(AC160),min
and
V
IH(AC135),min
(corresponding V
IL(AC160),min
and V
IL(AC135),min
). For DDR3-800, the address/
command inputs must use either V
IH(AC160),min
with
t
IS(AC160) of 210ps or V
IH(AC150),min
with
t
IS(AC135) of 365ps; independently, the data inputs must use either V
IH(AC160),min
with
t
DS(AC160) of 75ps or V
IH(AC150),min
with
t
DS(AC150) of 125ps.
8Gb: x4, x8, x16 DDR3L SDRAM
Electrical Specifications – DC and AC
41
Rev.2.0 June 2016
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