Datasheet

Table 12: I
DD2N
and I
DD3N
Measurement Loop
CK, CK#
CKE
Sub-Loop
Cycle Number
Command
CS#
RAS# CAS#
WE#
ODT
BA[2:0]
A[15:11]
A[10]
A[9:7] A[6:3] A[2:0]
Data
Toggling
Static HIGH
0
0 D 10000000000 –
1 D 10000000000 –
2 D# 111100000F0 –
3 D# 111100000F0 –
1 4–7 Repeat sub-loop 0, use BA[2:0] = 1
2 8–11 Repeat sub-loop 0, use BA[2:0] = 2
3 12–15 Repeat sub-loop 0, use BA[2:0] = 3
4 16–19 Repeat sub-loop 0, use BA[2:0] = 4
5 20–23 Repeat sub-loop 0, use BA[2:0] = 5
6 24–27 Repeat sub-loop 0, use BA[2:0] = 6
7 28–31 Repeat sub-loop 0, use BA[2:0] = 7
Notes:
1. DQ, DQS, DQS# are midlevel.
2. DM is LOW.
3. All banks closed during I
DD2N
; all banks open during I
DD3N
.
Table 13: I
DD2NT
Measurement Loop
CK, CK#
CKE
Sub-Loop
Cycle Number
Command
CS#
RAS# CAS#
WE#
ODT
BA[2:0]
A[15:11]
A[10]
A[9:7] A[6:3] A[2:0]
Data
Toggling
Static HIGH
0
0 D 10000000000 –
1 D 10000000000 –
2 D# 111100000F0 –
3 D# 111100000F0 –
1 4–7 Repeat sub-loop 0, use BA[2:0] = 1; ODT = 0
2 8–11 Repeat sub-loop 0, use BA[2:0] = 2; ODT = 1
3 12–15 Repeat sub-loop 0, use BA[2:0] = 3; ODT = 1
4 16–19 Repeat sub-loop 0, use BA[2:0] = 4; ODT = 0
5 20–23 Repeat sub-loop 0, use BA[2:0] = 5; ODT = 0
6 24–27 Repeat sub-loop 0, use BA[2:0] = 6; ODT = 1
7 28–31 Repeat sub-loop 0, use BA[2:0] = 7; ODT = 1
Notes:
1. DQ, DQS, DQS# are midlevel.
2. DM is LOW.
3. All banks closed.
8Gb: x4, x8, x16 DDR3L SDRAM
Electrical Specifications – I
DD
Specifications and Conditions
31
Rev.2.0 June 2016
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