Datasheet

Table Of Contents
Table 2: Addressing
Parameter 2 Gig x 4 1 Gig x 8 512 Meg x 16
Configuration 256 Meg x 4 x 8 banks 128 Meg x 8 x 8 banks 64 Meg x 16 x 8 banks
Refresh count 8K 8K 8K
Row address 64K (A[15:0]) 64K (A[15:0]) 64K (A[15:0])
Bank address 8 (BA[2:0]) 8 (BA[2:0]) 8 (BA[2:0])
Column address 4K (A[13,11, 9:0]) 2K (A[11,9:0]) 1K (A[9:0])
Page size 2KB 2KB 2KB
Figure 1: DDR3L Part Numbers
Example Part Number:
AS4C512M16D3L-12BCN
2GM4
1GM8
-
Configuration
AS4C
PackageSpeed
C
I
Package
96-ball 9.0mm x 14.0mm FBGA
Mark
B
78-ball 9.0mm x 13.2mm FBGA
B
Speed Grade
t
CK = 1.25ns, CL = 11
-12
8Gb: x4, x8, x16 DDR3L SDRAM
Description
2
Rev 2.0 June 2016
© 2015 Alliance Memory, Inc. All rights reserved.
Alliance Memory Inc. reserves the right to change products or specification without notice
Alliance Memory Inc. 511 Taylor Way, San Carlos, CA 94070
TEL: (650) 610-6800 FAX: (650) 620-9211
Temperature
Lead
Free
N
AS = Alliance Memory
4C= DRAM