Datasheet
Table Of Contents
- DDR3L SDRAM
- Description
- State Diagram
- Functional Description
- Functional Block Diagrams
- Ball Assignments and Descriptions
- Package Dimensions
- Electrical Specifications
- Thermal Characteristics
- Electrical Specifications – I DD Specifications and Conditions
- Electrical Characteristics – 1.35V IDD Specifications
- Electrical Specifications – DC and AC
- ODT Characteristics
- Output Driver Impedance
- Output Characteristics and Operating Conditions
- Speed Bin Tables
- Electrical Characteristics and AC Operating Conditions
- Electrical Characteristics and AC Operating Conditions
- Command and Address Setup, Hold, and Derating
- Data Setup, Hold, and Derating
- Commands – Truth Tables
- Commands
- Input Clock Frequency Change
- Write Leveling
- Initialization
- Voltage Initialization / Change
- Mode Registers
- Mode Register 0 (MR0)
- Mode Register 1 (MR1)
- Mode Register 2 (MR2)
- Mode Register 3 (MR3)
- MODE REGISTER SET (MRS) Command
- ZQ CALIBRATION Operation
- ACTIVATE Operation
- READ Operation
- WRITE Operation
- PRECHARGE Operation
- SELF REFRESH Operation
- Extended Temperature Usage
- Power-Down Mode
- RESET Operation
- On-Die Termination (ODT)
- Dynamic ODT
- Synchronous ODT Mode
- Asynchronous ODT Mode
- Asynchronous to Synchronous ODT Mode Transition (Power-Down Exit)
Figure 117: Asynchronous to Synchronous Transition During Precharge Power-Down (DLL Off) Exit
T0 T1 T2 Ta0 Ta1 Ta2 Ta3 Ta4 Ta5 Ta6 Tb0 Tb1 Tb2 Tc0 Tc1
Td0
Td1
Tc2
CK
CK#
Don’t CareTransitioning
ODT C
synchronous
NOP NOPNOP
COMMAND
NOP NOP NOP NOP NOP NOP NOP NOP NOP
R
TT
B
asynchronous
or synchronous
DRAM R
TT
A
asynchronous
DRAM R
TT
C
synchronous
R
TT,nom
NOPNOP
ODT B
asynchronous
or synchronous
CKE
t
AOF (MIN)
R
TT,nom
Indicates break
in time scale
ODTLoff +
t
AOF (MIN)
t
AOFPD (MAX)
ODTLoff +
t
AOF (MAX)
t
XPDLL
t
AOF (MAX)
ODTLoff
ODT A
asynchronous
PDX transition period
t
AOFPD (MIN)
t
AOFPD (MAX)
R
TT,nom
t
ANPD
t
AOFPD (MIN)
Note:
1. CL = 6; AL = CL - 1; CWL = 5; ODTLoff = WL - 2 = 8.
8Gb: x4, x8, x16 DDR3L SDRAM
Asynchronous to Synchronous ODT Mode Transition (Power-
Down Exit)
205
Rev.2.0 June 2016
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