Datasheet

Table 66: DDR3L Minimum Required Time
t
VAC Above V
IH(AC)
(Below V
IL(AC)
) for Valid DQ Transition
Slew Rate (V/ns)
DDR3L-800/1066 160mV
(ps) min
DDR3L-800/1066/1333
135mV (ps) min
DDR3L-1866/2133
130mV (ps) min
>2.0 165 113 95
2.0 165 113 95
1.5 138 90 73
1.0 85 45 30
0.9 67 30 16
0.8 45 11 Note 1
0.7 16 Note 1 –
0.6 Note 1 Note 1 –
0.5 Note 1 Note 1 –
<0.5 Note 1 Note 1 –
Note:
1. Rising input signal shall become equal to or greater than V
IH(AC)
level and Falling input
signal shall become equal to or less than V
IL(AC)
level.
8Gb: x4, x8, x16 DDR3L SDRAM
Data Setup, Hold, and Derating
103
Rev 2.0 June 2016
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