Datasheet

Table 65: DDR3L Derating Values for
t
DS/
t
DH – AC130/DC90-Based at 2V/ns
Shaded cells indicate slew rate combinations not supported
Δ
Δ
t
DS,
Δ
t
DH Derating (ps) – AC/DC-Based
DQ Slew Rate V/ns
DQS, DQS# Differential Slew Rate
8.0 V/ns 7.0 V/ns 6.0 V/ns 5.0 V/ns 4.0 V/ns 3.0 V/ns 2.0 V/ns 1.8 V/ns 1.6 V/ns 1.4 V/ns 1.2 V/ns 1.0 V/ns
Δ
t
DS
Δ
t
DH
Δ
t
DS
Δ
t
DH
Δ
t
DS
Δ
t
DH
Δ
t
DS
Δ
t
DH
Δ
t
DS
Δ
t
DH
Δ
t
DS
Δ
t
DH
Δ
t
DS
Δ
t
DH
Δ
t
DS
Δ
t
DH
Δ
t
DS
Δ
t
DH
Δ
t
DS
Δ
t
DH
Δ
t
DS
Δ
t
DH
Δ
t
DS
Δ
t
DH
4.0 33 23 33 23 33 23
3.5 28 19 28 19 28 19 28 19 3.0 22 15 22 15 22 15 22 15 22 15
2.5
139139139139139
2.0
0000000000
1.5
–22 –15 –22 –15 –22 –15 –22 –15 –14 –7
1.0
–65 –45 –65 –45 –65 –45 –57 –37 –49 –29
0.9
–62 –48 –62 –48 –54 –40 –46 –32 –38 –24
0.8
–61 –53 –53 –45 –45 –37 –37 –29 –29 –19
0.7
–49 –50 –41 -42 –33 –34 –25 –24 –17 –8
0.6
–37 -49 –29 –41 –21 –31 –13 –15
0.5
–31 –51 –23 –41 –15 –25
0.4
–28 –56 –20 –40
8Gb: x4, x8, x16 DDR3L SDRAM
Data Setup, Hold, and Derating
102
Rev 2.0 June 2016
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