Datasheet

Figure 24. Clock Suspension During Burst Read (Using CKE)
(Burst Length=4, CAS# Latency=3)
Hi-Z
T0 T1 T2
Don’t Care
T3 T4 T5 T6 T7 T8 T9
T10
T11 T12 T13 T14 T15 T16 T17 T18
T19 T20 T21 T22
RAx
RAx CAx
Activate
Command
Bank A
Read
Command
Bank A
Ax0 Ax1 Ax2 Ax3
t
HZ
Clock Suspend
1 Cycle
Clock Suspend
2 Cycles
Clock Suspend
3 Cycles
CLK
CS#
CKE
RAS#
CAS#
WE#
BA0,1
A10
A0-A9,
A11
DQM
DQ
AS4C4M32SA-6TIN
AS4C4M32SA-6TCN
AS4C4M32SA-7TCN
Confidential
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Rev.1.0 Sep.2015