Datasheet

Read Timing; Clock to Data Strobe relationship
The clock to data strobe relationship is shown below and is applicable in normal operation mode, i.e. when the
DLL is enabled and locked.
Rising data strobe edge parameters:
t
DQSCK
min/max describes the allowed range for a rising data strobe edge relative to CK, CK#.
t
DQSCK
is the actual position of a rising strobe edge relative to CK, CK#.
t
QSH
describes the data strobe high pulse width.
Falling data strobe edge parameters:
t
QSL
describes the data strobe low pulse width.
t
LZ(DQS)
, t
HZ(DQS)
for preamble/postamble.
NOTE 1. Within a burst, rising strobe edge can be varied within t
DQSCKi
while at the same voltage and temperature. However
incorporate the device, voltage and temperature variation, rising strobe edge variance window, t
DQSCKi
can shift
between t
DQSCK(min)
and t
DQSCK(max)
. A timing of this windows right inside edge ( latest ) from risinG CK, CK# is
limited by a devices actual t
DQSCK(max)
. A timing of this windows left inside edge (earliest) from rising CK, CK# is
limited by t
DQSCK(min)
.
NOTE 2. Notwithstanding note 1, a rising strobe edge with t
DQSCK(max)
at T(n) can not be immediately followed by a rising strobe
Edge with t
DQSCK(min)
at T(n+1). This is because other timing relationships (t
QSH
, t
QSL
) exist: if t
DQSCK(n+1)
< 0:
t
DQSCK(n)
< 1.0 t
CK
- (t
QSHmin
+ t
QSLmin
) - |t
DQSCK(n+1)
|
NOTE 3. The DQS, DQS# differential output high time is defined by t
QSH
and the DQS, DQS# differential output low time is
defined by t
QSL
.
NOTE 4. LikeWise, tLZ(DQS)min and tHZ(DQS)min are not tied to tDQSCKmin (early strobe case) and tLZ(DQS)max and
tHZ(DQS)max are not tied to t
DQSCKmax
(late strobe case).
NOTE 5. The minimum pulse width of read preamble is defined by t
RPRE(min)
.
NOTE 6. The maximum read postamble is bound by t
DQSCK(min)
plus t
QSH(min)
on the left side and t
HZDQS(max)
on the right side.
NOTE 7. The minimum pulse width of read postamble is defined by t
RPST(min)
.
NOTE 8. The maximum read preamble is bound by t
LZDQS(min)
on the left side and t
DQSCK(max)
on the right side.
CK#
CK
t
LZ(DQS) min
DQS, DQS#
Late Strobe
DQS, DQS#
Early Strobe
t
RPRE
t
LZ(DQS) max
t
DQSCK (min)
t
QSH
t
QSL
t
DQSCK (min)
t
QSH
t
QSL
t
QSH
t
QSL
t
DQSCK (min)
t
DQSCK (min)
t
RPST
t
HZ(DQS) (min)
Bit 0 Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7
t
DQSCK (max)
t
RPRE
t
QSH
t
QSL
t
DQSCK (max)
t
QSH
t
QSL
t
QSH
t
QSL
t
DQSCK (max)
t
DQSCK (max)
t
RPST
t
HZ(DQS) (max)
Bit 0 Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7
RL Measured
to this point
Figure 87. Clock to Data Strobe Relationship
AS4C256M16D4
Confidential
- 91 of 201 -
Rev.1.0 Aug.2019