Datasheet
Table 30. MPR Data Format
Address
MPR Location
[7]
[6]
[5]
[4]
[3]
[2]
[1]
[0]
Note
MPR page0 (Training Pattern)
BA1:BA0
00 = MPR0
0
1
0
1
0
1
0
1
Read/
Write
(default
value)
01 = MPR1
0
0
1
1
0
0
1
1
10 = MPR2
0
0
0
0
1
1
1
1
11 = MPR3
0
0
0
0
0
0
0
0
MPR page1 (CA Parity Error Log)
BA1:BA0
00 = MPR0
A[7]
A[6]
A[5]
A[4]
A[3]
A[2]
A[1]
A[0]
Read-only
01 = MPR1
CAS#/A15
WE#/A14
A[13]
A[12]
A[11]
A[10]
A[9]
A[8]
10 = MPR2
PAR
ACT#
-
BG[0]
BA[1]
BA[0]
don’t care
RAS#/A16
11 = MPR3
CRC
Error
Status
CA Parity
Error
Status
CA Parity Latency*
1
don’t care
don’t care
don’t care
MR5.A[2]
MR5.A[1]
MR5.A[0]
MPR page2 (MRS Readout)
BA1:BA0
00 = MPR0
hPPR
sPPR
R
TT_WR
Temperature sensor*
2
CRC Write
Enable
R
TT_WR
Read-only
-
-
MR2
-
-
MR2
MR2
-
-
A11
-
-
A12
A10
A9
01 = MPR1
V
REFDQ
Training
range
V
REFDQ
Training Value
Geardown
Enable
MR6
MR6
MR3
A6
A5
A4
A3
A2
A1
A0
A3
10 = MPR2
CAS Latency
RFU
CAS Write Latency
MR0
-
MR2
A6
A5
A4
A2
-
A5
A4
A3
11 = MPR3
R
TT_NOM
R
TT_PARK
Driver Impedance
MR1
MR5
MR1
A10
A9
A6
A8
A7
A6
A2
A1
MPR page3 (RFU)*
3
BA1:BA0
00 = MPR0
don’t care
don’t care
don’t care
don’t care
don’t care
don’t care
don’t care
don’t care
Read-only
01 = MPR1
don’t care
don’t care
don’t care
don’t care
don’t care
don’t care
don’t care
don’t care
10 = MPR2
don’t care
don’t care
don’t care
don’t care
don’t care
don’t care
don’t care
don’t care
11 = MPR3
don’t care
don’t care
don’t care
don’t care
MAC
MAC
MAC
MAC
Note 1. MPR3 bit 0~2 (CA parity latency) reflects the latest programmed CA parity latency values.
Note 2. MR bit for Temperature Sensor Readout
MR3 bit A5=1: DRAM updates the temperature sensor status to MPR Page 2 (MPR0 bits A4:A3). Temperature data is
guaranteed by the DRAM to be no more than 32ms old at the time of MPR Read of the Temperature Sensor Status bits.
MR3 bit A5=0: DRAM disables updates to the temperature sensor status in MPR Page 2(MPR0 bit A4:A3)
MPR0 bit A4
MPR0 bit A3
Refresh Rate Range
0
0
Sub 1X refresh ( > t
REFI
)
0
1
1X refresh rate(= t
REFI
)
1
0
2X refresh rate(1/2 * t
REFI
)
1
1
Reserved
Note 3. Restricted, except for MPR3 [3:0]
AS4C256M16D4
Confidential
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Rev.1.0 Aug.2019