Datasheet

CK#
T1 Ta0 Ta1 Ta2 Ta3T0
CK
CKE
DESZQCL DES VALID
t
ZQinit
or t
ZQoper
VALID
Tb0 Tb1
ZQCS DES
t
ZQCS
Tc0 Tc1
DES DES
ADDR
NOTE 1. CKE must be continuously registered high during the calibration procedure.
NOTE 2. During ZQ Calibration, ODT signal must be held LOW and DRAM continues to provide RTT_PARK.
NOTE 3. All devices connected to the DQ bus should be high impedance or RTT_PARK during the calibration procedure.
Tc2
DES VALID
VALID VALID VALID
A10
VALID
VALID
VALID
VALID
VALID
VALID
Notes 1
ODT
VALID
VALID
VALID
Notes 2
Hi-Z or RTT_PARK
ACTIVITIES
Hi-Z or RTT_PARK
Notes 3
ACTIV
ITIES
CMD
DQ Bus
Notes 1
Notes 2
Notes 3
DON'T CARETIME BREAK
Figure 43. ZQ Calibration Timing
AS4C256M16D4
Confidential
- 60 of 201 -
Rev.1.0 Aug.2019