Datasheet

Refresh Command
The Refresh command (REF) is used during normal operation of the device. This command is non
persistent, so it must be issued each time a refresh is required. The device requires Refresh cycles at an
average periodic interval of t
REFI
. When CS#, RAS#/A16 and CAS#/A15 are held Low and WE#/A14 and ACT#
are held High at the rising edge of the clock, the device enters a Refresh cycle. All banks of the SDRAM must
be precharged and idle for a minimum of the precharge time t
RP(min)
before the Refresh Command can be
applied. The refresh addressing is generated by the internal refresh controller. This makes the address bits
“Don’t Care” during a Refresh command. An internal address counter supplies the addresses during the
refresh cycle. No control of the external address bus is required once this cycle has started. When the refresh
cycle has completed, all banks of the SDRAM will be in the precharged (idle) state. A delay between the
Refresh Command and the next valid command, except DES, must be greater than or equal to the minimum
Refresh cycle time t
RFC(min)
. The t
RFC
timing parameter depends on memory density.
In general, a Refresh command needs to be issued to the device regularly every t
REFI
interval. To allow for
improved efficiency in scheduling and switching between tasks, some flexibility in the absolute refresh interval
is provided for postponing and pulling-in refresh command. A maximum of 8 Refresh commands can be postponed
when the device is in 1X refresh mode; a maximum of 16 Refresh commands can be postponed when the
device is in 2X refresh mode; and a maximum of 32 Refresh commands can be postponed when the device is
in 4X refresh mode.
When 8 consecutive Refresh commands are postponed, the resulting maximum interval between the
surrounding Refresh commands is limited to 9 × t
REFI
. For both the 2X and 4X refresh modes, the maximum
interval between surrounding Refresh commands allowed is limited to 17 × t
REFI
2 and 33 × t
REFI
4, respectively.
A limited number Refresh commands can be pulled-in as well. A maximum of 8 additional Refresh commands
can be issued in advance or “pulled-in” in 1X refresh mode, a maximum of 16 additional Refresh commands
can be issued when in advance in 2X refresh mode, and a maximum of 32 additional Refresh commands can
be issued in advance when in 4X refresh mode. Each of these Refresh commands reduces the number of
regular Refresh commands required later by one. Note that pulling in more than the maximum allowed
Refresh commands in advance does not further reduce the number of regular Refresh commands required
later, so that the resulting maximum interval between two surrounding Refresh commands is limited to 9 × t
REFI
,
17 × t
RFEI
2, or 33 × t
REFI
4. At any given time, a maximum of 16 additional REF commands can be issued within
2 × t
REFI
, 32 additional REF2 commands can be issued within 4 × t
REFI
2, and 64 additional REF4 commands
can be issued within 8 × t
REFI
4 (larger densities are limited by t
RFC
1, t
RFC
2, and t
RFC
4, respectively, which must
still be met).
DESREF DES REF DES DES VALID VALID VALID VALID VALID REF
NOTES:
1. Only DES commands allowed after Refresh command registered until tRFC(min) expires.
2. Time interval between two Refresh commands may be extended to a maximum of 9 x tREFI.
T0 T1 Ta0 Ta1 Tb0 Tb1 Tb2 Tb3
Tc0
CK#
CK
Tc1 Tc2 Tc3
VALID VALID VALID
DON'T CARETRANSITIONING DATA
t
RFC (min)
CMD
t
RFC
t
REFI (max. 9 x tREFI)
DRAM must be idle DRAM must be idle
TIME BREAK
Figure 42. Refresh Command Timing (Example of 1x Refresh mode)
AS4C256M16D4
Confidential
- 57 of 201 -
Rev.1.0 Aug.2019