Datasheet

Simplified State Diagram
This simplified State Diagram is intended to provide an overview of the possible state transitions and the
commands to control them. In particular, situations involving more than on bank, the enabling or disabling of
on-die termination, and some other events are not captured in full detail.
READ
WRITE
READ
Automatic Sequence
Command Sequence
Power applied
RESET
Procedure
Initialization
from any state
ZQCL
ZQ
Calibration
SRE
MRS
REF
SRX
ZQCL,ZQCS
Active
Power
Down
Activating
PDE
PDX
ACT
Writing
Writing Reading
Precharging
PDX
PDE
READ
READ A
READ A
WRITE
WRITE
WRITE A
READ A
PRE, PREA
WRITE A
WRITE A
PRE, PREA
PRE, PREA
ACT = Active
PRE = Precharge
PREA = Precharge All
MRS = Mode Register Set
REF = Refresh, Fine granularity Refresh
TEN = Boundary Scan Mode Enable
Read = RD, RDS4, RDS8
Read A = RDA, RDAS4, RDAS8
Write = WR, WRS4, WRS8 with/without CRC
Write A = WRA, WRAS4, WRAS8 with/without CRC
RESET = Start RESET procedure
PDE = Enter Power-down
PDX = Exit Power-down
SRE = Self-Refresh entry
SRX = Self-Refresh exit
MPR = Multi-Purpose Register
PDA = Per DRAM Addressability
Reading
MRS, MPR,
Write Leveling
V
REFDQ
training
Connectivity
Test
RESET
TEN
CKE_L
MRS
MRS
IV
REFDQ
,
R
TT
and
so on
SRX* = SRX with NOP
TEN
RESET
Refreshing
Power
On
MRS
PDA
mode
Self
Refresh
CKE_L
CKE_L
Bank
Active
Precharge
Power
Down
Idle
Figure 3. State Diagram
AS4C256M16D4
Confidential
- 5 of 201 -
Rev.1.0 Aug.2019