Datasheet

CK#
T1 Ta0 Tb0 Tb1 Tc0 Tc1 Td0T0
CK
CKE
DESVALID DES DES DES DES VALID
t
IS
t
IH
t
IS
t
IH
VALID VALID
VALID VALID
t
CKE
t
PD
t
CPDED
t
XP
Enter
Power-Down Mode
Exit
Power-Down Mode
ADDR
CMD
NOTE 1. Valid command at T0 is ACT, DES or Precharge with still one bank remaining open
after completion of the precharge command.
NOTE 2. ODT pin driven to a valid state. MR5 bit A5=0 (default setting) is shown.
ODT
2
DON'T CARETIME BREAK
Figure 27. Active Power-Down Entry and Exit Timing Diagram MR5 bit A5 =0
CK#
T1 Ta0 Tb0 Tb1 Tc0 Tc1 Td0T0
CK
CKE
DESVALID DES DES DES DES VALID
t
IS
t
IH
t
IS
t
IH
VALID VALID
VALID VALID
t
CKE
t
PD
t
CPDED
t
XP
Enter
Power-Down Mode
Exit
Power-Down Mode
ADDR
CMD
NOTE 1. Valid command at T0 is ACT, DES or Precharge with still one bank remaining open
after completion of the precharge command.
NOTE 2. ODT pin driven to a valid state. MR5 bit A5=1 is shown.
ODT
2
DON'T CARETIME BREAK
t
IS
Figure 28. Active Power-Down Entry and Exit Timing Diagram MR5 bit A5=1
AS4C256M16D4
Confidential
- 48 of 201 -
Rev.1.0 Aug.2019