Datasheet

Usage with Temperature Controlled Refresh mode
If the Temperature Controlled Refresh mode is enabled, then only the normal mode (Fixed 1x mode; MR3
[8:6] = 000) is allowed. If any other Refresh mode than the normal mode is selected, then the temperature
controlled Refresh mode must be disabled.
Self Refresh entry and exit
The device can enter Self Refresh mode anytime in 1x, 2x and 4x mode without any restriction on the
number of Refresh commands that has been issued during the mode before the Self Refresh entry. However,
upon Self Refresh exit, extra Refresh command(s) may be required depending on the condition of the Self
Refresh entry. The conditions and requirements for the extra Refresh command(s) are defined as follows:
1. There are no special restrictions on the fixed 1x Refresh rate mode.
2. In the fixed 2x Refresh rate mode or the enable-on-the-fly 1x/2x Refresh rate mode, it is recommended that
there should be an even number of REF2x commands before entry into Self Refresh since the last Self
Refresh exit or REF1x command or MRS command that set the refresh mode. If this condition is met, no
additional refresh commands are required upon Self Refresh exit. In the case that this condition is not met,
either one extra REF1x command or two extra REF2x commands are required to be issued to the DDR4
SDRAM upon Self Refresh exit. These extra Refresh commands are not counted toward the computation of
the average refresh interval (t
REFI
).
3. In the fixed 4x Refresh rate mode or the enable-on-the-fly 1x/4x Refresh rate mode, it is recommended that
there should be a multiple-of-four number of REF4x commands before entry into Self Refresh since the last
Self Refresh exit or REF1x command or MRS command that set the refresh mode. If this condition is met,
no additional refresh commands are required upon Self Refresh exit. In the case that this condition is not
met, either one extra REF1x command or four extra REF4x commands are required to be issued to the
DDR4 SDRAM upon Self Refresh exit. These extra Refresh commands are not counted toward the
computation of the average refresh interval (t
REFI
).
AS4C256M16D4
Confidential
- 42 of 201 -
Rev.1.0 Aug.2019