Datasheet

Changing Refresh Rate
If Refresh rate is changed by either MRS or on the fly, new t
REFI
and t
RFC
parameters would be applied from
the moment of the rate change. When REF1x command is issued to the DRAM, then t
REF
1 and t
RFC
1 are
applied from the time that the command was issued. when REF2x command is issued, then t
REF
2 and t
RFC
2
should be satisfied.
REF1DES DES DES DES VALID VALID REF2 DES DES VALID DES REF2 DES DES DES
t
RFC2 (min)
t
RFC1 (min)
t
REFI1
t
REFI2
Figure 24. On-the-fly Refresh Command Timing
The following conditions must be satisfied before the Refresh rate can be changed. Otherwise, data
retention cannot be guaranteed.
 In the fixed 2x Refresh rate mode or the on-the-fly 1x/2x Refresh mode, an even number of REF2x commands
must be issued because the last change of the Refresh rate mode with an MRS command before the
Refresh rate can be changed by another MRS command.
 In the on-the-fly 1x/2x Refresh rate mode, an even number of REF2x commands must be issued between
any two REF1x commands.
 In the fixed 4x Refresh rate mode or the on-the-fly 1x/4x Refresh mode, a multiple of-four number of REF4x
commands must be issued to the DDR4 SDRAM since the last change of the Refresh rate with an MRS
command before the Refresh rate can be changed by another MRS command.
 In the on-the-fly 1x/4x Refresh rate mode, a multiple-of-four number of REF4x commands must be issued
between any two REF1x commands.
There are no special restrictions for the fixed 1x Refresh rate mode. Switching between fixed and on-the-fly
modes keeping the same rate is not regarded as a Refresh rate change.
AS4C256M16D4
Confidential
- 41 of 201 -
Rev.1.0 Aug.2019