Datasheet

CAL Mode (CS# to Command Address Latency)
DDR4 supports Command Address Latency (CAL) function as a power savings feature. CAL is the delay in
clock cycles between CS# and CMD/ADDR defined by MR4[A8:A6].
CAL gives the DRAM time to enable the CMD/ADDR receivers before a command is issued. Once the
command and the address are latched, the receivers can be disabled. For consecutive commands, the DRAM
will keep the receivers enabled for the duration of the command sequence.
CK#
2 3 4 5 6 7 8 9 101
CS#
CK
11
CMD/
ADDR
t
CAL
12 13 14 15
Figure 15. Definition of CAL
CK#
2 3 4 5 6 7 8 9 101
CS#
CK
11
CMD/
ADDR
12
Figure 16. CAL operational timing for consecutive command issues
MRS Timings with Command/Address Latency enabled
When Command/Address latency mode is enabled, users must allow more time for MRS commands to take
effect. When CAL mode is enabled, or being enabled by an MRS command, the earliest the next valid
command can be issued is t
MOD_CAL
, where t
MOD_CAL
= t
MOD
+ t
CAL
.
Ta1 Ta2 Tb0 Tb1 Tb2 Tc0Ta0
MRS DES VALIDDES DES DES
NOTE1: MRS command at Ta1 enables CAL mode.
NOTE2: t
MOD_CAL
= t
MOD
+ t
CAL
.
t
CAL
t
MOD_CAL
CK#
CK
CS#
CMD
(w/o CS#)
Figure 17. CAL enable timing - t
MOD_CAL
AS4C256M16D4
Confidential
- 36 of 201 -
Rev.1.0 Aug.2019