Datasheet
Mode Register MR4
Table 12. MR4 Definition
BG0
BA1
BA0
RAS#
/A16
CAS#
/A15
WE#/
A14
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
1
0
0
0
0
0
hPPR
t
WPRE
t
RPRE
t
RPRE
training
SRF
abort
CS# to CMD/ADDR
Latency Mode
sPPR
Internal
V
REF
TCRM
TCRR
0
*1
0
*1
Note 1. Reserved for future use and must be programmed to 0 during MRS.
Write Preamble
Programmable Write preamble, t
WPRE
, can be set to 1t
CK
or 2t
CK
via the MR4 register. The 1t
CK
setting is
similar to DDR3. However, when operating in 2t
CK
Write preamble mode, CWL must be programmed to a
value at least 1 clock greater than the lowest CWL setting supported in the applicable t
CK
range. Some even
settings will require addition of 2 clocks. If the alternate longer CWL was used, the additional clocks will not be
required.
Read Preamble
Programmable Read preamble t
RPRE
can be set to 1t
CK
or 2t
CK
via the MR4 register. Both the 1t
CK
and 2t
CK
DDR4 preamble settings are different from that defined for the DDR3 SDRAM. Both DDR4 Read preamble
settings may require the memory controller to train (or read level) its data strobe receivers using the Read
preamble training.
Read Preamble Training
Programmable Read preamble training can be set to 1t
CK
or 2t
CK
. This mode can be used by the memory
controller to train or Read level its data strobe receivers.
Temperature-Controlled Refresh
When temperature-controlled refresh mode is enabled, the device may adjust the internal refresh period to
be longer than t
REFI
of the normal temperature range by skipping external Refresh commands with the proper
gear ratio. For example, the DRAM temperature sensor detected less than 45°C. Normal temperature mode
covers the range of -40°C to 85°C, while the extended temperature range covers -40°C to 95°C.
A13
hPPR
A8
A7
A6
CAL
A2
Temperature Controlled Refresh Range
0
Disable
0
0
0
Disabled
0
Normal
1
Enable
0
0
1
3
1
Extended
0
1
0
4
A10
Read Preamble Training Mode
0
1
1
5
A3
Temperature Controlled Refresh Mode
0
Disable
1
0
0
6
0
Disable
1
Enable
1
0
1
8
1
Enable
1
1
0
Reserved
A11
Read Preamble
1
1
1
Reserved
A5
sPPR
0
1 t
CK
0
Disable
1
2 t
CK
A4
Internal V
REF
Monitor
1
Enable
0
Disable
A12
Write Preamble
1
Enable
A9
Self Refresh Abort
0
1 t
CK
0
Disable
1
2 t
CK
1
Enable
AS4C256M16D4
Confidential
- 22 of 201 -
Rev.1.0 Aug.2019