Datasheet

RESET#
CK/CK#
CKE
CS#
ACT#, RAS#, CAS#, WE
A, BG,BA
ODT
ZQ
V
DD
V
PP
V
DDQ
DQS/DQS#
DQ
DM
I
DD
I
PP
I
DDQ
V
SS
V
SSQ
DDR4 SDRAM
NOTE 1. DIMM level Output test load condition may be different from above.
Figure 177. Measurement Setup and Test Load for IDD, IPP and IDDQ Measurements
Channel
IO Power
Simulation
Application specific
memory channel
environment
IDDQ
TestLad
X
Channel IO Power
Number
Channel
IO Power
Simulation
Channel
IO Power
Simulation
X
Figure 178. Correlation from simulated Channel IO Power to actual Channel IO Power supported by
IDDQ Measurement
AS4C256M16D4
Confidential
- 165 of 201 -
Rev.1.0 Aug.2019