Datasheet

ODT Mode Register and ODT State Table
The ODT Mode of DDR4 device has 4 states, Data Termination Disable, R
TT_WR
, R
TT_NOM
and R
TT_PARK
. And
the ODT Mode is enabled if any of MR1 A[10:8] or MR2 A[10:9] or MR5 A[8:6] are non zero. When enabled,
the value of R
TT
is determined by the settings of these bits.
After entering Self-Refresh mode, DRAM automatically disables ODT termination and set Hi-Z as termination
state regardless of these setting.
Controller can control each R
TT
condition with WR/RD command and ODT pin
 R
TT_WR
: The rank that is being written to provide termination regardless of ODT pin status (either high or low)
 R
TT_NOM
: DRAM turns ON R
TT_NOM
if it sees ODT asserted (except ODT is disabled by MR1).
 R
TT_PARK
: Default parked value set via MR5 to be enabled and ODT pin is driven low.
 Data Termination Disable: DRAM driving data upon receiving Read command disables the termination after
RL-X and stays off for a duration of BL/2 + X clock cycles. (X is 2 for 1t
CK
and 3 for 2t
CK
preamble mode).
The R
TT
values have the following priority:
which means if there is Write command along with ODT pin high, then DRAM turns on R
TT_WR
not R
TT_NOM
,
and also if there is Read command, then DRAM disables data termination regardless of ODT pin and goes
into driving mode.
 Data termination disable
 R
TT_WR
 R
TT_NOM
 R
TT_PARK
Table 62. Termination State Table
R
TT_PARK
MR5[8:6]
R
TT_NOM
MR1[10:8]
ODT pin
DRAM termination state
Note
Enabled
Enabled
High
R
TT_NOM
1,2
Low
R
TT_PARK
1,2
Disabled
Don’t care
3
R
TT_PARK
1,2,3
Disabled
Enabled
High
R
TT_NOM
1,2
Low
Hi-Z
1,2
Disabled
Don’t care
3
Hi-Z
1,2,3
Note 1. When a read command is executed, DRAM termination state will be High-Z for defined period independent of ODT pin and MR
setting of R
TT_PARK
/R
TT_NOM
. This is described in the ODT during Read section.
Note 2. If R
TT_WR
is enabled, R
TT_WR
will be activated by write command for defined period time independent of ODT pin and MR setting of
R
TT_PARK
/R
TT_NOM
. This is described in the Dynamic ODT section.
Note 3. If R
TT_NOM
MR is disabled, ODT receiver power will be turned off to save power.
AS4C256M16D4
Confidential
- 146 of 201 -
Rev.1.0 Aug.2019