Datasheet

DQS input high pulse width t
DQSH
0.45 0.55 t
CK
(avg)
27,28
DQS input low pulse width t
DQSL
0.45 0.55 t
CK
(avg)
26,28
DQS output high time t
QSH
0.40 - t
CK
(avg)
12,13
DQS output low time t
QSL
0.40 - t
CK
(avg)
12,13
Mode register set command cycle time t
MRD
4 - nCK
Mode register set command update
delay
t
MOD
15 - ns
12 - nCK
Read preamble time t
RPRE
0.9 - t
CK
(avg)
13,19
Read postamble time t
RPST
0.3 - t
CK
(avg)
11,13
Write preamble time t
WPRE
0.9 - t
CK
(avg)
1
Write postamble time t
WPST
0.3 - t
CK
(avg)
1
Write recovery time t
WR
15 - ns
Auto precharge write recovery
+ Precharge time
t
DAL
(min) WR + roundup [tRP / tCK(avg)] nCK
Multi-purpose register recovery time t
MPRR
1 - nCK
22
Internal write to read command delay
t
WTR
7.5 - ns
18
4 - nCK
18
Internal read to precharge command
delay
t
RTP
7.5 - ns
4 - nCK
Minimum CKE low width for Self-refresh
entry to exit timing
t
CKESR
t
CKE
(min)
+1nCK
-
Valid clock requirement after Self-
refresh entry or Power-down entry
t
CKSRE
10 - ns
5 - nCK
Valid clock requirement before Self-
refresh exit or Power-down exit
t
CKSRX
10 - ns
5 - nCK
Exit Self-refresh to commands
not requiring a locked DLL
t
XS
t
RFC
(min)
+10
-
ns
5 - nCK
Exit Self-refresh to commands
requiring a locked DLL
t
XSDLL
t
DLLK
(min)
-
nCK
Auto-refresh to Active/Auto-refresh
command time
t
RFC
260 -
ns
t
REFI
- 7.8
μs
Average Periodic Refresh Interval
+85°C < Tc <
+95°C
t
REFI
- 3.9
μs
CKE minimum high and low pulse width t
CKE
5 - ns
3 - nCK
Exit reset from CKE high to a valid
command
t
XPR
t
RFC
(min)
+10
-
ns
5 - nCK
DLL locking time t
DLLK
512 - nCK
Parameter Symbol
- 12 (DDR3-1600)
Unit NoteMin Max
Confidential
- 35/41 -
Rev.1.1 April 2017
Average Periodic Refresh Interval
-40°C < Tc < +85°C
AS4C256M16D3B-12BIN
AS4C256M16D3B-12BCN