Datasheet

AS4C16M32MD1
Confidential 51 Rev. 1.0/July 2014
8.5 AC Timings
[Recommended Operating Conditions: Notes 1-9]
PARAMETER
SYMBOL
- 5
UNIT
NOTES
MIN
MAX
DQ output access time
CL=3
tAC
2.0
5.0
ns
from CK/ CK
CL=2
2.0
6.5
DQS output access time from
CL=3
tDQSCK
2.0
5.0
ns
CK/ CK
CL=2
2.0
6.5
Clock high-level width
tCH
0.45
0.55
tCK
Clock low-level width
tCL
0.45
0.55
tCK
Clock half period
tHP
Min
ns
10,11
(tCL, tCH)
Clock cycle time
CL=3
tCK
5
ns
12
CL=2
12
ns
12
DQ and DM input setup
fast slew rate
tDS
0.48
ns
13,14,15
time
slow slew rate
0.58
ns
13,14,16
DQ and DM input hold time
fast slew rate
tDH
0.48
ns
13,14,15
slow slew rate
0.58
ns
13,14,16
DQ and DM input pulse width
tDIPW
1.4
ns
17
Address and control input
fast slew rate
tIS
0.9
ns
15,18
setup time
slow slew rate
1.1
ns
16,18
Address and control input
fast slew rate
tIH
0.9
ns
15,18
hold time
slow slew rate
1.1
ns
16,18
Address and control input pulse width
tIPW
2.3
ns
17
DQ & DQS low-impedance time from CK/
tLZ
1.0
ns
19
CK
DQ & DQS high-impedance
CL=3
tHZ
5.0
ns
19
time from CK/ CK
CL=2
6.5
DQS-DQ skew
tDQSQ
0.4
ns
20
DQ/DQS output hold time from DQS
tQH
tHP-tQHS
ns
11
Data hold skew factor
tQHS
0.5
ns
11
Write command to 1st DQS latching
tDQSS
0.75
1.25
tCK
transition
DQS input high-level width
tDQSH
0.4
0.6
tCK
DQS input low-level width
tDQSL
0.4
0.6
tCK
DQS falling edge to CK setup time
tDSS
0.2
tCK
DQS falling edge hold time from CK
tDSH
0.2
tCK
MODE REGISTER SET command period
tMRD
2
tCK
Write preamble setup time
tWPRES
0
ns
21
Write postamble
tWPST
0.4
0.6
tCK
22
Write preamble
tWPRE
0.25
tCK
Read preamble
CL = 3
tRPRE
0.9
1.1
tCK
23
CL = 2
0.5
1.1
tCK
23
Read postamble
tRPST
0.4
0.6
tCK
ACTIVE to PRECHARGE command period
tRAS
40
70,000
ns
ACTIVE to ACTIVE command period
tRC
tRAS+
ns
tRP
AUTO REFRESH to ACTIVE/AUTO
tRFC
72
ns
REFRESH command period
ACTIVE to READ or WRITE delay
tRCD
15
ns
PRECHARGE command period
tRP
3
tCK
ACTIVE bank A to ACTIVE bank B delay
tRRD
10
ns