Datasheet

AS4C16M32MD1
Confidential 2 Rev. 1.0/July 2014
512M (16M x32 bit) LP Mobile DDR SDRAM
Confidential (Rev. 1.0, July. /2014)
1. FEATURES
• Density : 512Mbit
• Data width: x32
• Power supply : VDD, VDDQ = 1.7 to 1.95V
• Speed
- Clock frequency : 200MHz (max.)
- Data rate : 400Mbps (max.)
• Four internal banks for concurrent
operation
• Interface : LVCMOS
• Burst lengths (BL) : 2, 4, 8, 16
• Burst type (BT)
- Sequential : 2, 4, 8, 16
- Interleave : 2, 4, 8, 16
• CAS# latency (CL) : 3
• Precharge : auto precharge option for each
burst access
• Driver strength : normal, 1/2, 1/4, 1/8
• Refresh : auto-refresh, self-refresh
• Refresh cycles : 8192 cycles/64ms
- Average refresh period : 7.8us
• Operating temperature range
- Commercial (Extended) -25°C to +85°C
- Industrial -40°C to +85°C
 Package: 90-ball FPBGA (8x13.0mm)
 All parts are ROHS Compliant
• Low power consumption
• Partial Array Self-Refresh (PASR)
• Auto Temperature Compensated Self-Refresh
(ATCSR) by built-in temperature sensor
• Deep power down mode(DPD Mode)
• Burst termination by burst stop command and
precharge command
• DDL is not implemented
• Double-data-rate architecture :
Two data transfers per one clock cycle
• The high speed data transfer is realized by the
2bits prefetch pipelined architecture
• Bi-directional data strobe (DQS) is transmitted/
received with data for capturing data at the
receiver
• DQS is edge-aligned with data for READs;
center-aligned with data for WRITEs
• Differential clock inputs (CK and CK#)
• Commands entered on each positive CK edge;
data and data mask referenced to both edges
of DQS
• Data mask (DM) for write data
• Clock Stop capability during idle periods