Datasheet

Figure 8 — Mode Register Set Command
Figure 9 — Mode Register Set Command Timing
7.4. Active
Before any READ or WRITE commands can be issued to a bank in the LPDDR SDRAM, a row in that bank must be opened.
This is accomplished by the ACTIVE command (see Figure 10): BA0 and BA1 select the bank, and the address inputs select the
row to be activated. More than one bank can be active at any time.
Once a row is open, a READ or WRITE command could be issued to that row, subject to the tRCD specification.
A subsequent ACTIVE command to another row in the same bank can only be issued after the previous row has been closed.
The minimum time interval between two successive ACTIVE commands on the same bank is defined by t
RC.
A subsequent ACTIVE command to another bank can be issued while the first bank is being accessed, which results in a
reduction of total row-access overhead. The minimum time interval between two successive ACTIVE commands on different
banks is defined by t
RRD. Figure 11 shows the tRCD and tRRD definition.
The row remains active until a PRECHARGE command (or READ or WRITE command with Auto Precharge) is
issued to the bank.
A PRECHARGE command (or READ or WRITE command with Auto Precharge) must be issued before opening a different row in the same
AS4C16M16MD1
256Mb MOBILE DDR SDRAM
Confidential
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Ver.1.1 Oct.2015