Datasheet

Description : SR : Slew Rate
Q : Query Output (like in DQ, which stands for Data-in, Query-Output)
se : Single-ended Signals For Ron = RZQ/7 setting
NOTE : (1) In two cased, a maximum slew rate of 6V/ns applies for a single DQ signal within a byte lane.
- Case_1 is defined for a single DQ signal within a byte lane which is switching into a certain direction (either from high
to low of low to high) while all remaining DQ signals in the same byte lane are static (i.e they stay at either high or low).
- Case_2 is defined for a single DQ signals in the same byte lane are switching into the opposite direction (i.e. from low
to high or high to low respectively). For the remaining DQ signal switching into the opposite direction, the regular maxi-
mum limit of 5 V/ns applies.
Differential Output Slew Rate
With the reference load for timing measurements, output slew rate for falling and rising edges is defined and measured
between VOLdiff(AC) and VOH-diff(AC) for differential signals.
NOTE : Output slew rate is verified by design and characterization, and may not be subject to production
test.
Parameter
Symbol Voltage
DDR3L-1600
Units
Min
Max
Single ended output
slew rate
SRQse 1.35V 1.75
5
(1)
V/ns
1.5V 2.5
5
V/ns
Description
Measured
Defined by
From To
Differential output slew rate for rising edge VOLdiff(AC) VOHdiff(AC) VOHdiff(AC)-VOLdiff(AC)
Delta TRdiff
Differential output slew rate for falling edge VOHdiff(AC) VOLdiff(AC) VOHdiff(AC)-VOLdiff(AC))
Delta TFdiff
Parameter
Symbol Voltage
DDR3L-1600
Units
Min Max
Differential output
slew rate
SRQdiff 1.35V 3.5 12 V/ns
1.5V 5 10 V/ns
Differential Output Slew Rate definition
AS4C128M16D3LB-12BCN
Confidential
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Rev.1.0 Mar 2016