User's Manual

G-120W-F unit data sheet
60
7368 ISAM ONT G-120W-F Product Guide
3FE-46922-AAAA-TCZZA Issue: 01
Figure 18 G-120W-F ONT hardware block
ONT SoC technology consists of five key elements:
• GPON MAC
The Gigabit Passive Optical Network Media Access Control (GPON MAC)
element on the SoC terminates the GPON interface using an optical diplexer. This
interface supports GPON as described in G.984.3 (GPON TC Layer) ITU
specification.
• Ethernet MAC
The SoC provides up to four GE MACs.
• DSP interface
The Digital Signal Processor (DSP) provides voice processing for 2 POTS lines
with 3-way calling. The DSP has a dedicated 64 kbyte instruction cache and
shares a 32 kbyte data cache with the Control Processor. It provides up to 4
network processor cores, each at 800MHz.
• Control Processor
The Control Processor features an integral memory management unit that
supports a dedicated 64 kbyte instruction cache and shares a single 32 kbyte data
cache with the DSP. The Control Processor and DSP also include a single
channel Data Management Application (DMA) controller with a 4 kbyte read
ahead low-latency Dynamic Random Access Memory (DRAM) access port. The
processors typically run at 600 MHz.
• Switch matrix
The Switch matrix provides an integrated data channel between the four GE
MACs, the GPON MAC, the DSP, the control processor, and the other integrated
elements such as flash memory, DRAM, and the local bus controller.
Control
processor
Ethernet
MACs
Ethernet ports GPON
POTS ports
DSP
GPON
MAC
SoC
19421
SoC Bridge
R05.06.01 | June 2017 | Edition 01