User`s manual

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The Choices: Disabled (default), Enabled.
CPU & PCI Bus Control
If you highlight the literal “Press Enter” next to the “CPU & PCI
Bus Control” label and then press the enter key, it will take you
a submenu with the following options:
PCI1/2 Master 0 WS Write
When Enabled, writes to the PCI bus are executed with zero-
wait states.
The Choices: Enabled (default), Disabled.
PCI Delay Transaction
The chipset has an embedded 32-bit posted write buffer to
support delay transactions cycles. Select Enabled to support
compliance with PCI specification.
The Choices: Disabled (default), Enabled.