Instructions

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Fig. 6.46
The output Q can be forced set to True with a rising edge at the input S (Set) and forced
reset to False with a rising edge at the input R (Reset), regardless of the states of the in-
puts C and D. The input R has higher priority.
6.2.2 Timers
 Pulse (TP)
 ON-delay timer (TON)
 OFF-delay timer (TOF)
 Timer (CLOCK)
 Weekly timer (CLOCKW)
6.2.2.1 Pulse (TP)
Fig. 6.47
The block TP is used to generate one output pulse with the specified pulse duration.
Fig. 6.48
The output Q becomes True with a rising edge at the input I for the time specified at the
input T. During this time, the output Q remains True regardless of the signal change at
the input I. The output Q is reset to False with the end of pulse.
The pulse duration and the time unit can be set in Property Box.
Fig. 6.49
Time range: 0…4147200000 ms or 48 days.