Specifications

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TMS320C54XX

Evaluation Module

2000 DSP Development Systems

Reference

Technical

Summary of content (45 pages)

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TMS320C54XX Evaluation Module Technical Reference 2000 DSP Development Systems
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TMS320C54XX Evaluation Module Technical Reference 503482-0001 Rev. H August 2000 SPECTRUM DIGITAL, INC. 12502 Exchange Drive, Suite 440 Stafford, TX. 77477 Tel: 281.494.4505 Fax: 281.494.5310 sales@spectrumdigital.com www.spectrumdigital.
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IMPORTANT NOTICE Spectrum Digital, Inc. reserves the right to make changes to its products or to discontinue any product or service without notice. Customers are advised to obtain the latest version of relevant information to verifythat the data being relied on is current before placing orders. Spectrum Digital, Inc. warrants performance of its products and related software to current specifications in accordance with Spectrum Digital’s standard warranty.
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Contents 1 Introduction to the TMS320C54XX Evaluation Module . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1 Provides you with a description of the TMS320C54XX Evaluation Module, key features, and board outline. 1.0 Overview of the TMS320C54XX EVM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.1 Key Features of the TMS320C54XX EVM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-2 1.2 Functional Overview of the TMS320C54XX EVM . . . . .
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A B C D E 2.10.5 JP4, AD50 AC/DC Coupling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.10.6 JP5, Synchronous Port Routing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.10.7 JP6, AD50 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.10.8 JP7, SYSCLK Select ....................................................... 2.10.
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About This Manual This document describes the board level operations of the TMS320C54XX evaluation module (EVM). The EVM is based on the Texas Instruments TMS320C54XX Digital Signal Processor. The TMS320C54XX EVM is a table top card to allow engineers and software developers to evaluate certain characteristics of the TMS320C54XX DSP to determine if the processor meets the designers application requirements. Evaluators can create software to execute onboard or expand the system in a variety of ways.
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Chapter 1 Introduction to the TMS320C54XX Evaluation Module Chapter One provides a description of the TMS32C54XX Evaluation Module along with the key features and a block diagram of the circuit board. Topic 1.0 1.1 1.
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Spectrum Digital, Inc 1.0 Overview of the TMS320C54XX EVM The TMS320C54XX evaluation module(EVM) is a stand-alone card. It allows evaluators to examine certain characteristics of the C54XX digital signal processor (DSP) to determine if it meets their application requirements. Furthermore, the module is an excellent platform to develop and run software on the C54XX family of processors. The C54XX EVM is shipped with a member of the C54xx family. The EVM allows full speed verification of C54XX code.
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Spectrum Digital, Inc 1.2 Functional Overview of the TMS320C54XX EVM Figure 1-1 shows a block diagram of the basic configuration for the C54XX EVM. The major interfaces of the EVM include the target RAM and ROM interface, target UART and sigma delta codec, and expansion interface. The C54XX interfaces to 256K Words of onboard static memory. An external I/O interface supports 65,000 parallel I/O ports and optional high speed synchronous serial port.
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Spectrum Digital, Inc 1-4 TMS320C54xx Evaluation Module Technical Reference
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Chapter 2 Operation of the TMS320C54XX Evaluation Module This chapter describes the operation of the TMS320C54XX Evaluation Module, the key interfaces and an outline of the circuit board. Topic 2.0 2.1 2.1.1 2.2 2.2.1 2.2.2 2.2.3 2.3 2.4 2.5 2.5.1 2.5.2 2.6 2.6.1 2.6.1.1 2.6.1.2 2.6.1.
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Spectrum Digital, Inc Topic Page 2.10 EVM320C54X Jumpers 2.10.1 Jumper Positions 2.10.2 JP1, UART Reset 2.10.3 JP2, Onboard UART CTS Routing 2.10.4 JP3, A15/A17 Select 2.10.5 JP4, AD50 AC/DC Coupling 2.10.6 JP5, Synchronous Port Routing 2.10.7 JP6, AD50 Reset 2.10.8 JP7, SYSCLK Option 2.10.9 JP8, AD50 Voltage Reference 2.10.10 JP9, DSP Core Voltage Select 2.10.11 JP10, Ready Routing 2.10.12 JP11, Onboard UART Interrupt Select 2.10.13 JP12, Voltage Select 2.10.14 JP13, Bootloader Enable/Disable 2.10.
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Spectrum Digital, Inc 2.0 The TMS320C54XX EVM Operation This chapter describes the C54XX Evaluation module, key components, and how they operate. It also provides information on the EVM’s various interfaces.The C54XX EVM consists of five major blocks of logic. • • • • • C54XX external memory Analog Interface On board Serial I/O interface Expansion interface JTAG Interface 2.1 The TMS320C54XX EVM Board The C54XX EVM is a 3U sized board which is powered by an external 5 Volt only power supply.
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Spectrum Digital, Inc 2.1.1 Power Connector The C54XX is powered by a 5 Volt only power supply which is available with the module. The board requires 1 amp. The power is supplied via 2 millimeter jack J1. If expansion boards are connected to the module a higher amperage power supply may be necessary. The board also has a 3.3 and 2.5 volt regulator to provide power to the lower voltage components. 2.
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Spectrum Digital, Inc The figure below shows the memory timing for the EVM320C54XX Evaluation Module.
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Spectrum Digital, Inc 2.2.1 Program Memory There are two configurations for program memory. The selection of these configurations is done by the 54X’s OVLY bit. When in OVLY mode, addresses 0x0000 - 0x8000 are internal for every page. In this mode, there are five (5) 32K word pages of external program RAM and one (1) 32K word page of internal RAM. When in linear mode program memory is mapped to external RAM. Shown below are the two program memory configurations.
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Spectrum Digital, Inc Linear Mode, OVLY = 0 Hex Hex 0x000000 0x00007F External RAM 0x000080 External 0x001FFF RAM 0x002000 External 0x007FFF 0x008000 0x00FF7F 0x00FF80 RAM External RAM Interrupts External 0x00FFFF RAM 0x010000 External RAM 0x027FFF Overlay Mode, OVLY = 1 0x028000 RAM Images 0x000000 Reserved 0x00007F 0x000080 0x001FFF 0x002000 0x007FFF Internal DARAM Internal SARAM 0x008000 Page 0 0x00FF7F External RAM 0x00FF80 0x00FFFF Page 0 Interrupts External RAM 0x018000 Pag
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Spectrum Digital, Inc Linear Mode, OVLY = 0 Overlay Mode, OVLY = 1 Hex Hex 0x000000 0x00007F External RAM 0x000080 External 0x001FFF RAM 0x002000 External 0x007FFF 0x008000 0x00FF7F 0x00FF80 Reserved 0x00007F 0x000080 0x003FFF External 0x007FFF External RAM Interrupts External 0x00FFFF RAM External RAM Internal DARAM 0x004000 RAM 0x010000 0x027FFF 0x000000 0x028000 0x008000 Page 0 0x00FF7F External RAM 0x00FF80 0x00FFFF Page 0 Interrupts External RAM 0x018000 Page 1 0x01FFFF
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Spectrum Digital, Inc Linear Mode, OVLY = 0 Overlay Mode, OVLY = 1 Hex Hex 0x000000 External 0x00007F Reserved 0x000000 Reserved 0x00007F 0x000080 0x000080 Internal External 0x007FFF 0x008000 DARAM 0x007FFF Page 0 0x008000 Page 0 * External RAM †† Image of page 4 0x00FF7F External RAM 0x00BFFF 0x00FF80 0x00C000 Page 0 * External MP/MC=1 0x00FFFF Page 0 Interrupts External RAM 0x00FFFF Internal ROM MP/MC=0 0x010000 Page 1 0x018000 Page 1 * External MP/MC=1 0x01FFFF Internal DARA
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Spectrum Digital, Inc 2.2.2 Data Memory The data memory configuration is shown below. The external data memory is mapped from 0x8000 to 0xFFFF for the C548 and C549 processors, and either internal or external for the C5410. Flash memory is also mapped in data space from 0x8000 to 0xFFFF when the UART OUT3 (DTR bit in MCR Register) bit is set to 0. This allows for boot loading. The memory space can be recovered for RAM memory by setting the OUT3 bit to 1.
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Spectrum Digital, Inc Figure 2-4B shows the data space memory map for the VC5410 and VC5416 DSP. Hex 0x0000 0x005F Memory-Mapped Registers 0x0060 Scratch Pad RAM 0x007F 0x0080 0x1FFF 0x2000 8K Dual Access RAM (DARAM) 0x7FFF Single Access RAM (SARAM) 0x8000 External RAM (OUT3=1, DROM=0) 0xFFFF FLASH ROM (OUT3=0, DROM=0) Internal SARAM2 (OUT3=X, DROM=1) Figure 2-4B, EVM320VC5410, VC5416 Data Space Figure 2-4C shows the data space memory map for the VC5402 DSP.
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Spectrum Digital, Inc 2.2.3 I/O Space The I/O map for the TMS320C54XX EVM is shown below: Hex 0x0000 Off-Chip UART 0x0FFF 0x1000 Expansion 0x7FFF 0x8000 FLASH ROM if OUT3 = 0 0xFFFF Expansion if OUT3 = 1 Figure 2-5, EVM320C54XX I/O Space 2.3 Onboard UART The TMS320C54XX EVM has a TL16C550 UART mapped into the I/O space of the C54XX at locations 0x0000 - 0x0008. The UART allows users to use this resource for data logging, code debugging or other application features.
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Spectrum Digital, Inc 2.5 Analog Interface The C54XX synchronous serial port can be used to access either the onboard TLC320AD50 sigma delta codec or be jumpered to the expansion connector. Jumper JP5 (1-2) is used to interconnect the serial port to the AD50. If the serial port is to be used from the expansion connector the plug should be in the 2-3 position.
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Spectrum Digital, Inc 2.6 Expansion Bus The TMS320C54XX EVM has an expansion bus which brings out all of the signals from the DSP. This expansion bus allows the user to design custom circuitry to be used with his application without having to design a CPU card. In addition this interface is used by Spectrum Digital for all of its add-on modules. This expansion bus is divided into 5 double row header connectors. This section contains the signal definitions and pin numbers for each of the connectors.
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Spectrum Digital, Inc 2.6.1 P1, I/O Expansion Connector Because different processors can be used to populate this evaluation module, different signals will be present on P1 depending on the processor used. The next 3 tables show these signals for the respective processors. 2.6.1.1 P1, I/O Expansion Connector for LC548, LC549, VC549 The definition of P1, which has the I/O signals for the LC548, LC549, VC549 are shown below.
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Spectrum Digital, Inc 2.6.1.2 P1, I/O Expansion Connector for VC5402 The definition of P1, which has the I/O signals for the VC5402 is shown below.
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Spectrum Digital, Inc 2.6.1.3 P1, I/O Expansion Connector for VC5409/VC5410, VC5416 The definition of P1, which has the I/O signals for the VC5409, VC5410, and VC5416 are shown below.
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Spectrum Digital, Inc 2.6.2 P2, Analog Expansion Connector The definition of P2, which has the analog signals is shown below.
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Spectrum Digital, Inc 2.6.3 P3, Address/data Expansion Connector The definition of P3, which has the address and data signals is shown below.
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Spectrum Digital, Inc 2.6.4 P4, Control Expansion Connector Because different processors can be used to populate this evaluation module, different signals will be present on P4 depending on the processor used. The next 2 tables show these signals for the respective processors. 2.6.4.1 P4, Control Expansion Connector for LC548, LC549, VC549, VC5409, VC5410, VC5416 The definition of P4, which has the control signals for the LC548, LC549, VC549, and VC5410 are shown below.
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Spectrum Digital, Inc 2.6.4.2 P4, Control Expansion Connector for VC5402 The definition of P4, which has the control signals for the VC5402 is shown below.
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Spectrum Digital, Inc 2.6.5 P6, Host Port Interface Expansion Connector The definition of P6, which has the Host Port Interface signals is shown below.
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Spectrum Digital, Inc 2.7 P7, JTAG Interface. The TMS320C54XX Evaluation Module is supplied with a 14 pin header interface, P7. This is the standard interface used by JTAG emulators to interface to Texas Instruments DSPs. The pinout for the connector is shown figure 2-6 below: TMS TDI PD (+5V) TDO TCK-RET TCK EMU0 1 3 5 7 9 11 13 2 4 6 8 10 12 14 TRSTGND no pin (key) GND GND GND EMU1 Header Dimensions Pin-to-Pin spacing, 0.100 in. (X,Y) Pin width, 0.025-in. square post Pin length, 0.235-in.
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Spectrum Digital, Inc 2.8 Onboard Serial Interface The EVM320C54XX has a TL16C550 UART (U8) which provides a an additional serial interface. This UART is mapped into I/O space at locations 0x0000 to 0x0008. This device allows users to use this resource for data logging, code debugging and other applications. The software wait state generator should be set to 3-7 wait states before accessing the UART. The UART interface GAL, U22, generates the necessary wait states to complete the interface cycle.
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Spectrum Digital, Inc The UART can be jumpered via JP11 to generate different interrupt levels. The type of interrupt is shown in the table below: Table 14: Onboard UART Interrupt Selection JP11 Position Interrupt Level 1-2 NMI 2-3 INT1 2.9 Boot Loading The EVM320C54xx is equipped with 32K words of flash ROM for parallel boot loading.
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Spectrum Digital, Inc Table 15: Sample Boot Load Format Stored In Flash ROM Data Space Address Data Space Data Function 0xFFFF 0x8000 Source Address ... 0x0000 Zero Fill 0xC009 0x0000 ...
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Spectrum Digital, Inc 2.10 EVM320C54X Jumpers The EVM320C54X has 14 jumpers which determine how features on the EVM are utilized. The table below lists the jumpers and their function. The following sections describe the use of each jumper.
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Spectrum Digital, Inc 2.10.1 Jumper Positions The figure 2-1 shows the locations of the jumpers on the EVM320C54XX EVM. 2.10.2 JP1, UART Reset Jumper JP1 is used to select either a system reset from P5, pin4 DTR line or to connect the DTR line to the UART’s CTS pin. When position 1-2 is selected the DTR activates the reset. The 2-3 position connects DTR to CTS.
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Spectrum Digital, Inc 2.10.5 JP4, AD50 AC/DC Coupling Jumper JP4 is used to select the coupling for the analog input. If position 1-2 is selected the coupling is DC. The 2-3 selection will provide AC coupling. Table 20: JP4, AC/DC Coupling Position Function 1-2 DC Coupled 2-3 AC Coupled 2.10.6 JP5, Synchronous Port Routing Jumper JP5 is used to connect the source of data for the synchronous serial port on the C54XX.
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Spectrum Digital, Inc 2.10.8 JP7, SYSCLK Option Jumper JP7 allows the selection of either the rising edge or falling edge of CLKOUT to generate READY for UART operations. As processor frequencies increase it will be necessary to pipeline the READY signal. This jumper provides for these requirements. The table below shows the two positions and their functions: Table 23: JP7, SYSCLK Option Position Function 1-2 Use Inverted CLKOUT for U20 GAL Clock 2-3 Use CLKOUT for U20 GAL Clock 2.10.
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Spectrum Digital, Inc 2.10.10 JP9, DSP Core Voltage Select Jumper JP9 is used to control the voltage to the core of the C54x DSP. If you are not sure of the core voltage refer to a data sheet prior to changing this jumper. The table below shows the setting and the corresponding voltages. This jumper is set to the appropriate position before shipment. Table 25: JP9, DSP Core Voltage Select Position Core Voltage Device JP12 1-2 3.3 Volts LC548, LC549 Not installed 2-3 2.
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Spectrum Digital, Inc 2.10.12 JP11, Onboard UART Interrupt Select The jumper JP11 is used to select which interrupt the onboard UART will use. Position 1-2 will cause an NMI interrupt. Position 2-3 will cause INT0. Table 27: JP11, Onboard UART Interrupt Selection JP6 Position Signal 1-2 NMI 2-3 INT0 This option is used to allow a debug monitor to be placed in ROM or for the serial port to be used with application software which requires interrupt masking. 2.10.
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Spectrum Digital, Inc 2.10.15 JP14, JP15, JP16, Oscillator Selection Jumpers JP14, JP15, and JP16 are used together to select different clock modes and speeds for the C54XX DSP. The EVM320C54XX is equipped with a 10 megahertz oscillator. The C54XX PLL can be configured in one of the two provided clock modes: - The input clock (CLKIN) is divided by 2 or 4; this is called DIV mode - The input clock (VLKIN) is multiplied by one of 31 possible ratios which range from 0.25 to 15.
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Spectrum Digital, Inc 2.11 LEDs The EVM320C54X EVM has two light emitting diodes. DS1 indicates the presence of +5 volts and is normally ‘on’ when power is applied to the board. DS2 is under software control. It is tied to the XF pin on the DSP. These are shown in the table below: Table 30: LEDs LED # Color Controlling Signal On Signal State DS1 Green +5 Volts 1 DS2 Red XF on DSP 1 2.12 Resets There are multiple resets for the TMS320C54XX EVM. The first reset is the power on reset.
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Printed in U.S.A., August 2000 503482-0001 Rev.