User`s guide

Aironet Wireless Communications, Inc. 7-17 Confidential and Proprietary
TxComplFID Register (I/O offset 0x24)
Bit #1514131211109876543210
Name Completed Transmit FID
This register is used to read the FID of transmit frame structure buffers. This FID becomes available as a
result of a completion (or failure) of an asynchronous transmission initiated by a Transmit command.
Completed transmit FID availability is signaled by the EvStat.Tx or the EvStat.TxExc bits. A
subsequent completed transmit FID can only become available after availability of the current FID is
acknowledged with the EvAck.Tx or the EvAck.TxExc bits.
Buffer Access Register Descriptions
These two sets of registers (BAP0 and BAP1) are used for PC4500/4800 buffer access. The specific
buffer is indicated by a FID or RID value in the Select register. The first word of the specific area within
that buffer to be accessed is indicated in the Offset register. After interpretation of those addressing
values by the PC4500/4800 controller, consecutive buffer words can be accessed by repeatedly writing or
reading the Data register. It is not possible to read the same work directly after it is written (the Selector
/ Offset register must be written again).
Note: When another area of the same buffer needs to be accessed, both the Select and the Data offset
registers must be written since the PC4500/4800 controller zeros the Select Register.
Select0-1 Registers (I/O offsets 0x18 or 0x1A)
Bit #1514131211109876543210
Name FID / RID
This register is used to write the FID/RID of a buffer to be accessed through the related Data register. A
valid FID/RID value must be written while Busy of the related Offset register is 0 and before the Data
offset value is written into that Offset register. A valid FID value is obtained via the FID management
registers. A valid RID value is 0xFF??, where ?? can be any value. This RID value always indicates the
temporary record buffer (see Access command).
Offset0-1 Registers (I/O offsets 0x1C or 0x1E)
Bit #1514131211109876543210
Name
busy Err done 0 Data offset 0
This register is used to write the initial buffer offset and to read the buffer access status. A Data offset
value must be written while Busy is 0 and after the FID / RID value is written into the related Select
register.
Busy – is automatically set to 1 when a value is written into this register (irrespective of the actual bit
value written) and is reset to 0 when the Err field becomes valid.
Err – 0 indicates that the data can be accessed.
1 indicates that the given offset points outside the buffer boundary or the FID / RID in the related
Select register is incorrect.
Done – the done bit will become 1 to indicate that the request was processed. (If done does not get set,
then restart.)