User`s guide

Aironet Wireless Communications, Inc. 7-13 Confidential and Proprietary

Note: Although a command (and parameters) may be written to the Command and Param registers when

Command.Busy is 0, the command will not be processed by the PC4500/4800 until the previous

command is acknowledged via EvAck.Cmd event.

Status Register (I/O offset 0x08)

Bit #1514131211109876543210

Name

Result 00Command Code

This register is used to read the status resulting from a command execution.

Status availability is signaled by the EvStat.Cmd bit. Future commands are only accepted (and hence,

subsequent status can become available) after the current status is acknowledged with the EvAck.Cmd

bit.

Details of specific status information is provided with the appropriate command descriptions.

Resp0-2 Registers (I/O offsets 0x0A - 0x0E)

Bit #1514131211109876543210

Name Command Response

These registers are used to read the response resulting from various command executions. The register

values are only valid while status availability is signaled (before status acknowledgement).

Details of specific response information is provided with the appropriate command descriptions.

Event Register Descriptions

These registers provide for notification from the PC4500/4800 to the host. Each event is individually

acknowledgeable, individually maskable and each may generate an interrupt signal. Each specific event

is signaled in one of the EvStat register bits and acknowledged with the corresponding bit in the EvAck

hardware interrupt condition.

Each event has associated registers that must be read before the event is acknowledged or the information

being indicated by the event may be lost. The following table shows the associated register for each

event.

EvStat Register (I/O offset 0x30)

The EvStat register is used to read if one or more events have occurred. This a read-only register.

Bit #15141312111098765432 10

Name

0000000Awa

Link 0 0 cmd alloc Txexc TX RX