User`s guide

Aironet Wireless Communications, Inc. 5-1 Confidential and Proprietary
5
CHAPTER 5 A
ISA Hardware Interface Operation
This chapter details the hardware aspects of the PC4500/4800 ISA host interface. See Chapter 7 for details
about the ISA software interface.
ISA Hardware
The PC4500/4800 ISA interface functions as either an 8-bit (byte only) or a 16-bit (word only) I/O
interface device. The interface does not adhere to all signal definitions according to the ISA specification
as some signals must be driven according to the PCMCIA specification. External address decode circuitry
and control signal gating is required. The tables below summarize the interface signals. This interface
provides access to the PC4500/4800 I/O memory (host registers).
Access to the MAC controller registers and shared memory is via 32 (16-bit) registers mapped into the host
I/O space. The PC4500/4800 also requires a host interrupt channel for communication synchronization.
The provision of these resources are typically performed by the host hardware and the host-side device
driver.
For more complete information about the ISA electrical interface, refer to IEEE specification 996 or the
text by Edward Solari (see the Applicable Documents section on page x).
ISA Mode
ISA mode on the PC4500/4800 uses PCMCIA timing and signals. It is called ISA mode in the sense that
the PCMCIA configuration registers are not accessed in order to enable the card. The PC4500/4800
supports ISA mode by tying the VPP2 PCMCIA pin low at reset in order to enable the host interface. In
this mode, the PCMCIA configuration registers are disabled and cannot be accessed. Likewise, the