Technical data

70 U4154A Logic Analyzer Service Guide
5 Troubleshooting
Self-Test Descriptions
The self- tests for U4154A logic analyzer identify the correct
operation of major functional areas in the U4154A module.
PC Board Revision Test
This tests that the FPGA is communicating with the
backplane and that the board under test is a supported
version.
Interface FPGA Version Test
This test verifies that the FPGA program is a version that
the software can use. This is necessary because new features
will be added to the U4154A that will require both new
software and new FPGA bits.
Interface FPGA Register Test
The purpose of this test is to verify that the backplane
interface can communicate with the backplane FPGA. The
FPGA must be working before any of the other circuits on
the board will work. Also, the FPGA generates the board ID
code that is returned to identify the module and slot.
FPGA to FPGA Communication Test
This test is only run if there are two or more U4154A logic
analyzer cards installed in a chassis and connected together
with the flex cables. The purpose of this test is to verify
that the FPGAs can drive and receive the signals correctly.
SPI Bus Communication Test
The purpose of this test is to verify communications over the
SPI bus from the Interface FPGA to various devices attached
to the SPI bus.
EEPROM Test
The purpose of this test is to verify:
• The address and data paths to the EEPROM.
• That each cell in the EEPROM can be programmed high
and low.