Programming instructions

Command Reference
Status Subsystem (:STATus)
Chapter 4196
:QUEStionable:ENABle
Supported All
:STATus:QUEStionable:ENABle <value>
:STATus:QUEStionable:ENABle?
This command determines what bits in the Data Questionable Event Register will set
the Data Questionable Status Group Summary bit (bit 3) in the Status Byte Register.
The variable <value> is the sum of the decimal values of the bits that you want to
enable.
*RST N/A
Range 0–32767
Key Entry N/A
Remarks Refer to “Data Questionable Status Group” on page 120 and “Data
Questionable Event Enable Register” on page 123 for more
information.
:QUEStionable:FREQuency:CONDition
Supported All
:STATus:QUEStionable:FREQuency:CONDition?
This command returns the decimal sum of the bits in the Data Questionable Frequency
Condition Register. For example, if the 1 GHz internal reference clock is unlocked (bit 2),
a value of 4 is returned.
*RST N/A
Range 0–32767
Key Entry N/A
Remarks Refer to “Data Questionable Frequency Status Group” on page 127 and
“Data Questionable Frequency Condition Register” on page 128 for
more information.
The data in this register is continuously updated and reflects current
conditions.