Programming instructions

Programming the Status Register System
Status Groups
Chapter 3118
Standard Operation Condition Register
The Standard Operation Condition Register continuously monitors the hardware and
firmware status of the signal generator. Condition registers are read only.
Table 3-5 Standard Operation Condition Register Bits
Bit Description
0 Unused. This bit is always set to 0.
1 Settling. A 1 in this bit position indicates that the signal generator is settling.
2 Unused. These bits are always set to 0.
3 Sweeping. A 1 in this bit position indicates that a sweep is in progress.
4 Unused. This bit is always set to 0.
5 Waiting for Trigger. A 1 in this bit position indicates that the source is in a “wait for
trigger” state of the trigger model.
6,7,8 Unused. These bits are always set to 0.
9
DCFM/DCφM Null in Progress. A 1 in this bit position indicates that the signal
generator is currently performing a DCFM/DCΦM zero calibration.
10 Unused. This bit is always set to 0.
11 Sweep Calculating. A 1 in this bit position indicates that the signal generator is
currently doing the necessary pre-sweep calculations.
12, 13, 14, Unused. These bits are always set to 0.
15 Always 0.
Query:
STATus:OPERation:CONDition?
Response: The decimal sum of the bits set to 1
Example: The decimal value 520 is returned. The decimal sum = 512 (bit 9) + 8 (bit 3).