Specifications

4
Page 7
安捷倫科技高頻元件量測研討會
Feb.23, 2006
Computer Interconnect Standards
XAUI
On Chip
PCI 32/33 & 64/66
Chip-to-Chip Local Bus SystemBackplane
CoreConnect SCSI
USB
Serial ATA
IEEE 1394
1Gb Ethernet
CompactPCI
VME
PCI-X 66 & 100
POS-PHY L3/L4
XAUI
3GIO/PCI-Express
2.5Gb/s
RapidIO
3.125Gb/s
3.125Gb/s
Fibre-Channel
InfiniBand
2.5Gb/s
1.5Gb/s
HyperTransport
1.6Gb/s
Second gen PCI-Express (5-6.25Gb/s)
6Gb/s SATA III
6.25Gb/s double XAUI
VXS Backplane (VITA41)
AdvancedTCA (PICMG 3.x)
GigE Backplane (VITA 31.1)
StarFabric Backplane (PICMG 2.17)
Serial Mesh Backplane (PICMG 2.20)
VME320
1.0Gb/s
2.5Gb/s
2.0Gb/s
3.0Gb/s
5.0Gb/s
6.0Gb/s
10Gb Ethernet
CSIX
Flexbus 4
10.0Gb/s
Page 8
安捷倫科技高頻元件量測研討會
Feb.23, 2006
High-Speed Signaling Standards
Standard
Data Rate
(Gb/s)
Driver Edge
Rate (ps)
Receiver
Sensitivity
Receiver Eye
Opening or
Setup/Hold
Serial
PCI Express (3GIO) 2.5
RapidIO Serial 3.125
10GbE XAUI 3.125 50ps 200mVpp 100ps
Fibre Channel 2125 2.125 to to to
Infiniband 2.5 140ps 400mVpp 140ps
Serial ATA 1.5
Parallel
RapidIO 8/16 2
HyperTransport 1.6
9Edge rates are decreasing below 100ps
9Differential voltage swings are shrinking
9The model bandwidth required for accurate measurements is primarily
dependent on the signal’s risetime, not its data rate.