Specifications
4
安捷倫科技高頻元件量測研討會
2/23/2006
Page 7
PoP and PiP
Available 2006 2007
Package/ Die
Count
Package Thickness
Package Structure
Package/ Die Count
Package Thickness
Package Structure
2 PKG/ 3 Chip
2 PKG/ 3 Chip 2 PKG/ 4 Chip
3 PKG/ 7 Chip
1.6 mm Max
1.4 mm Max
1.2 mm Max
2.0 mm Max
ASIC
Flash SDRAM
ASIC
Flash SDRAM
Flash SDRAM
ASIC
Flash SDRAM
ASIC
1.4 mm Max
1.2 mm Max
1.0 mm Max
2 PKG/ 3 Chip
2 PKG/ 3 Chip
2 PKG/ 3 Chip
W/B Type
F/C Type
PoP
PiP
安捷倫科技高頻元件量測研討會
2/23/2006
Page 8
IC Feature Size (um)
0.25 0.18 0.13 0.09 0.065
• Wire Bond pad Pitch (um)
(Single-In-Line)
• Wire Bond Pad Pitch (um)
(2 Row Staggered)
• Wire Bond Pad Pitch (um)
(Tri-Tier)
•Wire Bond pad pitch (um )
( Quad-Tier )
60 50 45 40 35
80/40 70/35 60/30 50/25 40/20
90/45 80/40 70/35 60/30 50/25
100/50 90/45 80/40 70/35 60/30
Leading-Edge Fine-Pitch Capabilities
In-Line: 45 um; Staggered: 60 um; Tri-Tier: 70 um ; Quad-Tier: 80um
Low k & Copper wafer capabilities available.
Fine Pitch Wire Bonding