Specifications

2
安捷倫科技高頻元件量測研討會
2/23/2006
Page 3
Bio tech / New form chip
IC/module/
System Design
High speed/high frequency
High thermal / Stress solution
Fab/fabless
Copper wafer
Low K material
12” wafer
Naro meter tech
Front/Back end
solution
Environment friendly
Compact Size
Low power consumption
Integrated
System
Low cost
Short Time to
Market
Worldwide strategy
Semiconductor
Industry
Interesting Semiconductor
World
安捷倫科技高頻元件量測研討會
2/23/2006
Page 4
Packaging Technology Trend
Single Chip Package
Stacked Package
Flip Chip
Stacked Die
1995
2000 2005
2010
QFP
Multiple Chip Package
BGA
MCM
FC+WB
System in Package
Laminate
2 & 4 Layer
Build-Up
Substrate
Multi-Layer
PCB
Chip
Functional Substrate
(Active & Passive Chip)
PiP
PoP
Wire Bond
Wire Bond + FC Bond
New
Interconnection?